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68 lines
2.6 KiB
Markdown
68 lines
2.6 KiB
Markdown
[← Home](../../README.md) · [Hardware](../README.md)
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# ECS Chipset — A600 / A3000 / A500+
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## Overview
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The **Enhanced Chip Set** (ECS) is a significant revision of OCS, shipping from 1990 onward. It adds 2 MB Chip RAM addressing, programmable display timing, and extended registers while maintaining full backward compatibility with OCS software.
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## Chip Summary
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| Chip | Part | Changes from OCS |
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|---|---|---|
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| **Super Agnus** | MOS 8372A | Addresses 2 MB Chip RAM, extended DMA window |
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| **ECS Denise** | MOS 8373 | BPLCON3, border blank, programmable sync |
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| **Paula** | MOS 8364 | Unchanged |
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## Contents
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| File | Topic |
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|---|---|
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| [chipset_ecs.md](chipset_ecs.md) | Super Agnus and ECS Denise internals |
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| [ecs_registers_delta.md](ecs_registers_delta.md) | New/changed registers vs OCS |
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| [productivity_modes.md](productivity_modes.md) | Multiscan/productivity display modes |
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| [gary_system_controller.md](gary_system_controller.md) | Gary — A3000 bus controller, DMA arbitration, SCSI glue |
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| [Gayle IDE & PCMCIA](../common/gayle_ide_pcmcia.md) | A600 Gayle: IDE and PCMCIA (shared with A1200) |
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| [chip_ram_expansion.md](chip_ram_expansion.md) | 2 MB Chip RAM with Super Agnus |
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## ECS vs OCS — Key Differences
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| Feature | OCS | ECS |
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|---|---|---|
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| Max Chip RAM | 1 MB (Fat Agnus) | **2 MB** (Super Agnus) |
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| Display sync | Fixed NTSC/PAL | **BEAMCON0** — programmable |
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| Bitplane scroll | 4-bit (BPLCON1) | Extended (ECS Denise) |
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| Border blank | No | **BPLCON3** border control |
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| Hires sprites | No | ECS Denise extended sprite control |
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| DMA window | Smaller | Extended: wider bitplane fetch |
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## Identifying ECS at Runtime
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```c
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#include <exec/execbase.h>
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struct ExecBase *SysBase = *((struct ExecBase **)4);
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/* AttnFlags does not directly identify chipset */
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/* Use graphics.library GfxBase->ChipRevBits0 */
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#include <graphics/gfxbase.h>
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struct GfxBase *GfxBase = (struct GfxBase *)OpenLibrary("graphics.library", 0);
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if (GfxBase->ChipRevBits0 & GFXB_BIG_BLITTER) { /* ECS+ */ }
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if (GfxBase->ChipRevBits0 & GFXB_HR_AGNUS) { /* Super Agnus */ }
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if (GfxBase->ChipRevBits0 & GFXB_HR_DENISE) { /* ECS Denise */ }
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```
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## Machines Using ECS
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| Model | Notes |
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|---|---|
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| A3000 | Super Agnus + ECS Denise; 68030; SCSI; Zorro III |
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| A500+ | Super Agnus (1 MB variant); ECS Denise; no IDE |
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| A600 | Super Agnus (1 MB variant); ECS Denise; Gayle; IDE; PCMCIA |
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| A2000 (late) | Some late rev boards shipped with ECS chips |
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## References
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- ADCD 2.1 Hardware Manual — ECS extension chapters
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- NDK39: `graphics/gfxbase.h` — ChipRevBits0 flags
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- *Amiga Hardware Reference Manual* 3rd ed. — ECS appendix
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