Changed MOVE.w/l as,<ea> implementation to reflect real behavior

This commit is contained in:
Rodolphe de Saint Léger 2025-05-19 18:02:33 +02:00
parent b7910339a3
commit 93831dd116
5 changed files with 957 additions and 964 deletions

View file

@ -1481,6 +1481,12 @@ public class CoreGenerator {
}
private void misc_microcode() {
addState("ea_as_dt");
decode_ay();
addFormattedMicroInsn("dt = dar[ry]");
addFormattedMicroInsn("nmpc = decoded.a3");
addFormattedMicroInsn("break");
addState("op_clrb_ds");
decode_dy();
addFormattedMicroInsn("dar[ry] &= ~0xff");

View file

@ -34,6 +34,8 @@ public class CorePLAGenerator {
private static final int EA_DPC = 0x0080;
private static final int EA_DPCI = 0x0100;
private static final int EA_IMM = 0x0200; /* always fetched, no address */
private static final int EA_AS = 0x0400;
private static final int EA_DS = 0x0800;
private static final int EA_FETCH = 0x8000;
private static final int EA_ALL = EA_AIS | EA_AIPS | EA_PAIS | EA_DAS | EA_DAIS | EA_ADR16 | EA_ADR32 | EA_DPC
@ -64,118 +66,118 @@ public class CorePLAGenerator {
public static void fillops(CoreGenerator gen, List<MacroEntry> entries, MacroEntry[] array) {
appendOP_eas(0x0000, 0xffc0, "ori_b_imm8", EA_FETCH | EA_MALT, "8", dyadic(gen, "or", "b", "imm8", "ds"), null, (opcode, opmask, opname, n2, mode) -> {
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm16", n2, mode == 0 ? "dbrr" : dyadic(gen, "or", "b", "imm8", "ea"));
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm16", n2, (mode & EA_ALL ) == 0 ? "dbrr" : dyadic(gen, "or", "b", "imm8", "ea"));
});
appendOP_eas(0x0040, 0xffc0, "ori_w_imm16", EA_FETCH | EA_MALT, "16", dyadic(gen, "or", "w", "imm16", "ds"), null, (opcode, opmask, opname, n2, mode) -> {
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm16", n2, mode == 0 ? "dbrr" : dyadic(gen, "or", "w", "imm16", "ea"));
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm16", n2, (mode & EA_ALL ) == 0 ? "dbrr" : dyadic(gen, "or", "w", "imm16", "ea"));
});
appendOP_eas(0x0080, 0xffc0, "ori_l_imm32", EA_FETCH | EA_MALT, "32", dyadic(gen, "or", "l", "imm32", "ds"), null, (opcode, opmask, opname, n2, mode) -> {
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm32", n2, mode == 0 ? "dbrr" : dyadic(gen, "or", "l", "imm32", "ea"));
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm32", n2, (mode & EA_ALL ) == 0 ? "dbrr" : dyadic(gen, "or", "l", "imm32", "ea"));
});
appendOP(gen, entries, array, 0x003c, 0xffff, "ori_imm8_ccr", "op_imm16", dyadic(gen, "or", "b", "imm8", "ccr"), "dbrr");
appendOP(gen, entries, array, 0x007c, 0xffff, "ori_i16u_sr", "op_imm16", dyadic(gen, "or", "w", "imm16", "sr"), "dbrr");
appendOP_eas(0x0100, 0xf1c0, "btst_dd", EA_FETCH | EA_ALL, "8", dyadic(gen, "btst", "l", "dd", "ds"), null, (opcode, opmask, opname, n1, mode) -> {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", mode == 0 ? "dbrr" : dyadic(gen, "btst", "b", "dd", "ea"));
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", (mode & EA_ALL ) == 0 ? "dbrr" : dyadic(gen, "btst", "b", "dd", "ea"));
});
appendOP(gen, entries, array, 0x0108, 0xf1f8, "movep_w_das_dd", "ea_das16", "dbrr", "op_movepw_das_dd");
appendOP_eas(0x0140, 0xf1c0, "bchg_dd", EA_FETCH | EA_MALT, "8", dyadic(gen, "bchg", "l", "dd", "ds"), null, (opcode, opmask, opname, n1, mode) -> {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", mode == 0 ? "dbrr" : dyadic(gen, "bchg", "b", "dd", "ea"));
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", (mode & EA_ALL ) == 0 ? "dbrr" : dyadic(gen, "bchg", "b", "dd", "ea"));
});
appendOP(gen, entries, array, 0x0148, 0xf1f8, "movep_l_das_dd", "ea_das32", "dbrr", "op_movepl_das_dd");
appendOP_eas(0x0180, 0xf1c0, "bclr_dd", EA_FETCH | EA_MALT, "8", dyadic(gen, "bclr", "l", "dd", "ds"), null, (opcode, opmask, opname, n1, mode) -> {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", mode == 0 ? "dbrr" : dyadic(gen, "bclr", "b", "dd", "ea"));
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", (mode & EA_ALL ) == 0 ? "dbrr" : dyadic(gen, "bclr", "b", "dd", "ea"));
});
appendOP(gen, entries, array, 0x0188, 0xf1f8, "movep_w_dd_das", "ea_das16", "dbrr", "op_movepw_dd_das");
appendOP_eas(0x01c0, 0xf1c0, "bset_dd", EA_FETCH | EA_MALT, "8", dyadic(gen, "bset", "l", "dd", "ds"), null, (opcode, opmask, opname, n1, mode) -> {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", mode == 0 ? "dbrr" : dyadic(gen, "bset", "b", "dd", "ea"));
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", (mode & EA_ALL ) == 0 ? "dbrr" : dyadic(gen, "bset", "b", "dd", "ea"));
});
appendOP(gen, entries, array, 0x01c8, 0xf1f8, "movep_l_dd_das", "ea_das32", "dbrr", "op_movepl_dd_das");
appendOP_eas(0x0200, 0xffc0, "andi_b_imm8", EA_FETCH | EA_MALT, "8", dyadic(gen, "and", "b", "imm8", "ds"), null, (opcode, opmask, opname, n2, mode) -> {
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm16", n2, mode == 0 ? "dbrr" : dyadic(gen, "and", "b", "imm8", "ea"));
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm16", n2, (mode & EA_ALL ) == 0 ? "dbrr" : dyadic(gen, "and", "b", "imm8", "ea"));
});
appendOP_eas(0x0240, 0xffc0, "andi_w_imm16", EA_FETCH | EA_MALT, "16", dyadic(gen, "and", "w", "imm16", "ds"), null, (opcode, opmask, opname, n2, mode) -> {
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm16", n2, mode == 0 ? "dbrr" : dyadic(gen, "and", "w", "imm16", "ea"));
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm16", n2, (mode & EA_ALL ) == 0 ? "dbrr" : dyadic(gen, "and", "w", "imm16", "ea"));
});
appendOP_eas(0x0280, 0xffc0, "andi_l_imm32", EA_FETCH | EA_MALT, "32", dyadic(gen, "and", "l", "imm32", "ds"), null, (opcode, opmask, opname, n2, mode) -> {
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm32", n2, mode == 0 ? "dbrr" : dyadic(gen, "and", "l", "imm32", "ea"));
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm32", n2, (mode & EA_ALL ) == 0 ? "dbrr" : dyadic(gen, "and", "l", "imm32", "ea"));
});
appendOP(gen, entries, array, 0x023c, 0xffff, "andi_imm8_ccr", "op_imm16", dyadic(gen, "and", "b", "imm8", "ccr"), "dbrr");
appendOP(gen, entries, array, 0x027c, 0xffff, "andi_i16u_sr", "op_imm16", dyadic(gen, "and", "w", "imm16", "sr"), "dbrr");
appendOP_eas(0x0400, 0xffc0, "subi_b_imm8", EA_FETCH | EA_MALT, "8", dyadic(gen, "sub", "b", "imm8", "ds"), null, (opcode, opmask, opname, n2, mode) -> {
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm16", n2, mode == 0 ? "dbrr" : dyadic(gen, "sub", "b", "imm8", "ea"));
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm16", n2, (mode & EA_ALL ) == 0 ? "dbrr" : dyadic(gen, "sub", "b", "imm8", "ea"));
});
appendOP_eas(0x0440, 0xffc0, "subi_w_imm16", EA_FETCH | EA_MALT, "16", dyadic(gen, "sub", "w", "imm16", "ds"), null, (opcode, opmask, opname, n2, mode) -> {
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm16", n2, mode == 0 ? "dbrr" : dyadic(gen, "sub", "w", "imm16", "ea"));
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm16", n2, (mode & EA_ALL ) == 0 ? "dbrr" : dyadic(gen, "sub", "w", "imm16", "ea"));
});
appendOP_eas(0x0480, 0xffc0, "subi_l_imm32", EA_FETCH | EA_MALT, "32", dyadic(gen, "sub", "l", "imm32", "ds"), null, (opcode, opmask, opname, n2, mode) -> {
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm32", n2, mode == 0 ? "dbrr" : dyadic(gen, "sub", "l", "imm32", "ea"));
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm32", n2, (mode & EA_ALL ) == 0 ? "dbrr" : dyadic(gen, "sub", "l", "imm32", "ea"));
});
appendOP_eas(0x0600, 0xffc0, "addi_b_imm8", EA_FETCH | EA_MALT, "8", dyadic(gen, "add", "b", "imm8", "ds"), null, (opcode, opmask, opname, n2, mode) -> {
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm16", n2, mode == 0 ? "dbrr" : dyadic(gen, "add", "b", "imm8", "ea"));
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm16", n2, (mode & EA_ALL ) == 0 ? "dbrr" : dyadic(gen, "add", "b", "imm8", "ea"));
});
appendOP_eas(0x0640, 0xffc0, "addi_w_imm16", EA_FETCH | EA_MALT, "16", dyadic(gen, "add", "w", "imm16", "ds"), null, (opcode, opmask, opname, n2, mode) -> {
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm16", n2, mode == 0 ? "dbrr" : dyadic(gen, "add", "w", "imm16", "ea"));
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm16", n2, (mode & EA_ALL ) == 0 ? "dbrr" : dyadic(gen, "add", "w", "imm16", "ea"));
});
appendOP_eas(0x0680, 0xffc0, "addi_l_imm32", EA_FETCH | EA_MALT, "32", dyadic(gen, "add", "l", "imm32", "ds"), null, (opcode, opmask, opname, n2, mode) -> {
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm32", n2, mode == 0 ? "dbrr" : dyadic(gen, "add", "l", "imm32", "ea"));
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm32", n2, (mode & EA_ALL ) == 0 ? "dbrr" : dyadic(gen, "add", "l", "imm32", "ea"));
});
appendOP_eas(0x0800, 0xffc0, "btst_imm8", EA_FETCH | EA_MEM, "8", dyadic(gen, "btst", "l", "imm8", "ds"), null, (opcode, opmask, opname, n2, mode) -> {
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm16", n2, mode == 0 ? "dbrr" : dyadic(gen, "btst", "b", "imm8", "ea"));
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm16", n2, (mode & EA_ALL ) == 0 ? "dbrr" : dyadic(gen, "btst", "b", "imm8", "ea"));
});
appendOP_eas(0x0840, 0xffc0, "bchg_imm8", EA_FETCH | EA_MALT, "8", dyadic(gen, "bchg", "l", "imm8", "ds"), null, (opcode, opmask, opname, n2, mode) -> {
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm16", n2, mode == 0 ? "dbrr" : dyadic(gen, "bchg", "b", "imm8", "ea"));
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm16", n2, (mode & EA_ALL ) == 0 ? "dbrr" : dyadic(gen, "bchg", "b", "imm8", "ea"));
});
appendOP_eas(0x0880, 0xffc0, "bclr_imm8", EA_FETCH | EA_MALT, "8", dyadic(gen, "bclr", "l", "imm8", "ds"), null, (opcode, opmask, opname, n2, mode) -> {
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm16", n2, mode == 0 ? "dbrr" : dyadic(gen, "bclr", "b", "imm8", "ea"));
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm16", n2, (mode & EA_ALL ) == 0 ? "dbrr" : dyadic(gen, "bclr", "b", "imm8", "ea"));
});
appendOP_eas(0x08c0, 0xffc0, "bset_imm8", EA_FETCH | EA_MALT, "8", dyadic(gen, "bset", "l", "imm8", "ds"), null, (opcode, opmask, opname, n2, mode) -> {
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm16", n2, mode == 0 ? "dbrr" : dyadic(gen, "bset", "b", "imm8", "ea"));
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm16", n2, (mode & EA_ALL ) == 0 ? "dbrr" : dyadic(gen, "bset", "b", "imm8", "ea"));
});
appendOP_eas(0x0a00, 0xffc0, "eori_b_imm8", EA_FETCH | EA_MALT, "8", dyadic(gen, "eor", "b", "imm8", "ds"), null, (opcode, opmask, opname, n2, mode) -> {
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm16", n2, mode == 0 ? "dbrr" : dyadic(gen, "eor", "b", "imm8", "ea"));
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm16", n2, (mode & EA_ALL ) == 0 ? "dbrr" : dyadic(gen, "eor", "b", "imm8", "ea"));
});
appendOP_eas(0x0a40, 0xffc0, "eori_w_imm16", EA_FETCH | EA_MALT, "16", dyadic(gen, "eor", "w", "imm16", "ds"), null, (opcode, opmask, opname, n2, mode) -> {
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm16", n2, mode == 0 ? "dbrr" : dyadic(gen, "eor", "w", "imm16", "ea"));
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm16", n2, (mode & EA_ALL ) == 0 ? "dbrr" : dyadic(gen, "eor", "w", "imm16", "ea"));
});
appendOP_eas(0x0a80, 0xffc0, "eori_l_imm32", EA_FETCH | EA_MALT, "32", dyadic(gen, "eor", "l", "imm32", "ds"), null, (opcode, opmask, opname, n2, mode) -> {
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm32", n2, mode == 0 ? "dbrr" : dyadic(gen, "eor", "l", "imm32", "ea"));
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm32", n2, (mode & EA_ALL ) == 0 ? "dbrr" : dyadic(gen, "eor", "l", "imm32", "ea"));
});
appendOP(gen, entries, array, 0x0a3c, 0xffff, "eori_imm8_ccr", "op_imm16", dyadic(gen, "eor", "b", "imm8", "ccr"), "dbrr");
appendOP(gen, entries, array, 0x0a7c, 0xffff, "eori_i16u_sr", "op_imm16", dyadic(gen, "eor", "w", "imm8", "sr"), "dbrr");
appendOP_eas(0x0c00, 0xffc0, "cmpi_b_imm8", EA_FETCH | EA_MALT, "8", dyadic(gen, "cmp", "b", "imm8", "ds"), null, (opcode, opmask, opname, n2, mode) -> {
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm16", n2, mode == 0 ? "dbrr" : dyadic(gen, "cmp", "b", "imm8", "ea"));
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm16", n2, (mode & EA_ALL ) == 0 ? "dbrr" : dyadic(gen, "cmp", "b", "imm8", "ea"));
});
appendOP_eas(0x0c40, 0xffc0, "cmpi_w_imm16", EA_FETCH | EA_MALT, "16", dyadic(gen, "cmp", "w", "imm16", "ds"), null, (opcode, opmask, opname, n2, mode) -> {
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm16", n2, mode == 0 ? "dbrr" : dyadic(gen, "cmp", "w", "imm16", "ea"));
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm16", n2, (mode & EA_ALL ) == 0 ? "dbrr" : dyadic(gen, "cmp", "w", "imm16", "ea"));
});
appendOP_eas(0x0c80, 0xffc0, "cmpi_l_imm32", EA_FETCH | EA_MALT, "32", dyadic(gen, "cmp", "l", "imm32", "ds"), null, (opcode, opmask, opname, n2, mode) -> {
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm32", n2, mode == 0 ? "dbrr" : dyadic(gen, "cmp", "l", "imm32", "ea"));
appendOP(gen, entries, array, opcode, opmask, opname, "op_imm32", n2, (mode & EA_ALL ) == 0 ? "dbrr" : dyadic(gen, "cmp", "l", "imm32", "ea"));
});
appendOP_eas(0x1000, 0xf000, "move_b", EA_FETCH | EA_ALL, "8", move(gen , "b", "ds", "ea"), null, (scode, smask, sname, n1, smode) -> {
appendOP_ead(scode, smask, sname, EA_MALT, "8", move(gen , "b", "ea", "dd"), null, (opcode, opmask, opname, n3, dmode) -> {
if ((smode == 0) && (dmode == 0)) {
if ((smode == EA_DS) && (dmode == EA_DS)) {
appendOP(gen, entries, array, opcode, opmask, opname, move(gen , "b", "ds", "dd"), "dbrr", "dbrr");
} else if (smode == 0) {
} else if (smode == EA_DS) {
appendOP(gen, entries, array, opcode, opmask, opname, n3, n1, "dbrr");
} else if (dmode == 0) {
} else if (dmode == EA_DS) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", n3);
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, move(gen , "b", "ea", "ea"), n3);
@ -183,13 +185,15 @@ public class CorePLAGenerator {
});
});
appendOP_eas(0x2000, 0xf000, "move_l", EA_FETCH | EA_ALL, "32", move(gen , "l", "ds", "ea"), move(gen , "l", "as", "ea"), (scode, smask, sname, n1, smode) -> {
appendOP_eas(0x2000, 0xf000, "move_l", EA_FETCH | EA_ALL, "32", move(gen , "l", "ds", "ea"), move(gen , "l", "ea", "ea"), (scode, smask, sname, n1, smode) -> {
appendOP_ead(scode, smask, sname, EA_MALT, "32", move(gen , "l", "ea", "dd"), null, (opcode, opmask, opname, n3, dmode) -> {
if ((smode == 0) && (dmode == 0)) {
appendOP(gen, entries, array, opcode, opmask, opname, move(gen , "l", (opcode & 0x38) == 8 ? "as" : "ds", "dd"), "dbrr", "dbrr");
} else if (smode == 0) {
if (((smode & (EA_DS | EA_AS)) != 0) && (dmode == EA_DS)) {
appendOP(gen, entries, array, opcode, opmask, opname, move(gen , "l", smode == EA_AS ? "as" : "ds", "dd"), "dbrr", "dbrr");
} else if (smode == EA_DS) {
appendOP(gen, entries, array, opcode, opmask, opname, n3, n1, "dbrr");
} else if (dmode == 0) {
} else if (smode == EA_AS) {
appendOP(gen, entries, array, opcode, opmask, opname, "ea_as_dt", move(gen , "l", "ea", "ea"), n3);
} else if ((dmode & (EA_DS | EA_AS)) != 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", n3);
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, move(gen , "l", "ea", "ea"), n3);
@ -200,20 +204,22 @@ public class CorePLAGenerator {
appendOP_eas(0x2040, 0xf1c0, "movea_l", EA_FETCH | EA_ALL, "32", move(gen , "l", "ds", "ad"), move(gen , "l", "as", "ad"), (opcode, opmask, opname, n1, mode) -> {
opname = String.format("%s_ad", opname);
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", move(gen , "l", "ea", "ad"));
}
});
appendOP_eas(0x3000, 0xf000, "move_w", EA_FETCH | EA_ALL, "16", move(gen , "w", "ds", "ea"), move(gen , "w", "as", "ea"), (scode, smask, sname, n1, smode) -> {
appendOP_eas(0x3000, 0xf000, "move_w", EA_FETCH | EA_ALL, "16", move(gen , "w", "ds", "ea"), move(gen , "w", "ea", "ea"), (scode, smask, sname, n1, smode) -> {
appendOP_ead(scode, smask, sname, EA_MALT, "16", move(gen , "w", "ea", "dd"), null, (opcode, opmask, opname, n3, dmode) -> {
if ((smode == 0) && (dmode == 0)) {
appendOP(gen, entries, array, opcode, opmask, opname, move(gen , "w", (opcode & 0x38) == 8 ? "as" : "ds", "dd"), "dbrr", "dbrr");
} else if (smode == 0) {
if (((smode & (EA_DS | EA_AS)) != 0) && (dmode == EA_DS)) {
appendOP(gen, entries, array, opcode, opmask, opname, move(gen , "w", smode == EA_AS ? "as" : "ds", "dd"), "dbrr", "dbrr");
} else if (smode == EA_DS) {
appendOP(gen, entries, array, opcode, opmask, opname, n3, n1, "dbrr");
} else if (dmode == 0) {
} else if (smode == EA_AS) {
appendOP(gen, entries, array, opcode, opmask, opname, "ea_as_dt", move(gen , "w", "ea", "ea"), n3);
} else if ((dmode & (EA_DS | EA_AS)) != 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", n3);
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, move(gen , "w", "ea", "ea"), n3);
@ -224,7 +230,7 @@ public class CorePLAGenerator {
appendOP_eas(0x3040, 0xf1c0, "movea_w", EA_FETCH | EA_ALL, "16", move(gen , "w", "ds", "ad"), move(gen , "w", "as", "ad"), (opcode, opmask, opname, n1, mode) -> {
opname = String.format("%s_ad", opname);
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", move(gen , "w", "ea", "ad"));
@ -232,21 +238,21 @@ public class CorePLAGenerator {
});
appendOP_eas(0x4000, 0xffc0, "negx_b", EA_FETCH | EA_MALT, "8", monadic(gen, "negx", "b", "ds"), null, (opcode, opmask, opname, n1, mode) -> {
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", monadic(gen, "negx", "b", "ea"));
}
});
appendOP_eas(0x4040, 0xffc0, "negx_w", EA_FETCH | EA_MALT, "16", monadic(gen, "negx", "w", "ds"), null, (opcode, opmask, opname, n1, mode) -> {
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", monadic(gen, "negx", "w", "ea"));
}
});
appendOP_eas(0x4080, 0xffc0, "negx_l", EA_FETCH | EA_MALT, "32", monadic(gen, "negx", "l", "ds"), null, (opcode, opmask, opname, n1, mode) -> {
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", monadic(gen, "negx", "l", "ea"));
@ -254,7 +260,7 @@ public class CorePLAGenerator {
});
appendOP_eas(0x40c0, 0xffc0, "move_sr", EA_MALT, "16", move(gen , "w", "sr", "ds"), null, (opcode, opmask, opname, n1, mode) -> {
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", move(gen , "w", "sr", "ea"));
@ -264,11 +270,11 @@ public class CorePLAGenerator {
appendOP_eas(0x4180, 0xf1c0, "chk_w", EA_FETCH | EA_ALL, "16", "op_chk_w_ds", null, (opcode, opmask, opname, n1, mode) -> {
opname = String.format("%s_dd", opname);
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", mode == 0 ? "dbrr" : "op_chk_w_ea");
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", (mode & EA_ALL ) == 0 ? "dbrr" : "op_chk_w_ea");
});
appendOP_eas(0x42c0, 0xffc0, "move_ccr", EA_MALT, "16", move(gen , "w", "ccr", "ds"), null, (opcode, opmask, opname, n1, mode) -> {
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", move(gen , "w", "ccr", "ea"));
@ -278,7 +284,7 @@ public class CorePLAGenerator {
appendOP_eas(0x44c0, 0xffc0, "move", EA_FETCH | EA_ALL, "16", move(gen , "w", "ds", "ccr"), null, (opcode, opmask, opname, n1, mode) -> {
opname = String.format("%s_ccr", opname);
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", move(gen , "w", "ea", "ccr"));
@ -288,7 +294,7 @@ public class CorePLAGenerator {
appendOP_eas(0x46c0, 0xffc0, "move", EA_FETCH | EA_ALL, "16", move(gen , "w", "ds", "sr"), null, (opcode, opmask, opname, n1, mode) -> {
opname = String.format("%s_sr", opname);
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", move(gen , "w", "ea", "sr"));
@ -302,21 +308,21 @@ public class CorePLAGenerator {
});
appendOP_eas(0x4200, 0xffc0, "clr_b", EA_MALT, "8", "op_clrb_ds", null, (opcode, opmask, opname, n1, mode) -> {
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "op_clrb_ea");
}
});
appendOP_eas(0x4240, 0xffc0, "clr_w", EA_MALT, "16", "op_clrw_ds", null, (opcode, opmask, opname, n1, mode) -> {
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "op_clrw_ea");
}
});
appendOP_eas(0x4280, 0xffc0, "clr_l", EA_MALT, "32", "op_clrl_ds", null, (opcode, opmask, opname, n1, mode) -> {
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "op_clrl_ea");
@ -324,21 +330,21 @@ public class CorePLAGenerator {
});
appendOP_eas(0x4400, 0xffc0, "neg_b", EA_FETCH | EA_MALT, "8", monadic(gen, "neg", "b", "ds"), null, (opcode, opmask, opname, n1, mode) -> {
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", monadic(gen, "neg", "b", "ea"));
}
});
appendOP_eas(0x4440, 0xffc0, "neg_w", EA_FETCH | EA_MALT, "16", monadic(gen, "neg", "w", "ds"), null, (opcode, opmask, opname, n1, mode) -> {
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", monadic(gen, "neg", "w", "ea"));
}
});
appendOP_eas(0x4480, 0xffc0, "neg_l", EA_FETCH | EA_MALT, "32", monadic(gen, "neg", "l", "ds"), null, (opcode, opmask, opname, n1, mode) -> {
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", monadic(gen, "neg", "l", "ea"));
@ -346,21 +352,21 @@ public class CorePLAGenerator {
});
appendOP_eas(0x4600, 0xffc0, "not_b", EA_FETCH | EA_MALT, "8", monadic(gen, "not", "b", "ds"), null, (opcode, opmask, opname, n1, mode) -> {
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", monadic(gen, "not", "b", "ea"));
}
});
appendOP_eas(0x4640, 0xffc0, "not_w", EA_FETCH | EA_MALT, "16", monadic(gen, "not", "w", "ds"), null, (opcode, opmask, opname, n1, mode) -> {
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", monadic(gen, "not", "w", "ea"));
}
});
appendOP_eas(0x4680, 0xffc0, "not_l", EA_FETCH | EA_MALT, "32", monadic(gen, "not", "l", "ds"), null, (opcode, opmask, opname, n1, mode) -> {
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", monadic(gen, "not", "l", "ea"));
@ -368,7 +374,7 @@ public class CorePLAGenerator {
});
appendOP_eas(0x4800, 0xffc0, "nbcd_b", EA_FETCH | EA_MALT, "8", monadic(gen, "nbcd", "b", "ds"), null, (opcode, opmask, opname, n1, mode) -> {
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", monadic(gen, "nbcd", "b", "ea"));
@ -386,21 +392,21 @@ public class CorePLAGenerator {
appendOP(gen, entries, array, 0x49c0, 0xfff8, "extb_l_ds", "op_extbl_ds", "dbrr", "dbrr");
appendOP_eas(0x4a00, 0xffc0, "tst_b", EA_FETCH | EA_MALT, "8", monadic(gen, "tst", "b", "ds"), null, (opcode, opmask, opname, n1, mode) -> {
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", monadic(gen, "tst", "b", "ea"));
}
});
appendOP_eas(0x4a40, 0xffc0, "tst_w", EA_FETCH | EA_MALT, "16", monadic(gen, "tst", "w", "ds"), null, (opcode, opmask, opname, n1, mode) -> {
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", monadic(gen, "tst", "w", "ea"));
}
});
appendOP_eas(0x4a80, 0xffc0, "tst_l", EA_FETCH | EA_MALT, "32", monadic(gen, "tst", "l", "ds"), null, (opcode, opmask, opname, n1, mode) -> {
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", monadic(gen, "tst", "l", "ea"));
@ -486,21 +492,21 @@ public class CorePLAGenerator {
});
appendOP_eas(0x5000, 0xf1c0, "addq_b_imm3", EA_FETCH | EA_MALT, "8", dyadic(gen, "add", "b", "imm3", "ds"), null, (opcode, opmask, opname, n1, mode) -> {
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", dyadic(gen, "add", "b", "imm3", "ea"));
}
});
appendOP_eas(0x5040, 0xf1c0, "addq_w_imm3", EA_FETCH | EA_MALT, "16", dyadic(gen, "add", "w", "imm3", "ds"), dyadic(gen, "add", "w", "imm3", "as"), (opcode, opmask, opname, n1, mode) -> {
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", dyadic(gen, "add", "w", "imm3", "ea"));
}
});
appendOP_eas(0x5080, 0xf1c0, "addq_l_imm3", EA_FETCH | EA_MALT, "32", dyadic(gen, "add", "l", "imm3", "ds"), dyadic(gen, "add", "l", "imm3", "as"), (opcode, opmask, opname, n1, mode) -> {
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", dyadic(gen, "add", "l", "imm3", "ea"));
@ -510,21 +516,21 @@ public class CorePLAGenerator {
appendOP(gen, entries, array, 0x50c8, 0xf0f8, "dbcc", "op_dbcc", "dbrr", "dbrr");
appendOP_eas(0x5100, 0xf1c0, "subq_b_imm3", EA_FETCH | EA_MALT, "8", dyadic(gen, "sub", "b", "imm3", "ds"), null, (opcode, opmask, opname, n1, mode) -> {
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", dyadic(gen, "sub", "b", "imm3", "ea"));
}
});
appendOP_eas(0x5140, 0xf1c0, "subq_w_imm3", EA_FETCH | EA_MALT, "16", dyadic(gen, "sub", "w", "imm3", "ds"), dyadic(gen, "sub", "w", "imm3", "as"), (opcode, opmask, opname, n1, mode) -> {
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", dyadic(gen, "sub", "w", "imm3", "ea"));
}
});
appendOP_eas(0x5180, 0xf1c0, "subq_l_imm3", EA_FETCH | EA_MALT, "32", dyadic(gen, "sub", "l", "imm3", "ds"), dyadic(gen, "sub", "l", "imm3", "as"), (opcode, opmask, opname, n1, mode) -> {
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", dyadic(gen, "sub", "l", "imm3", "ea"));
@ -532,7 +538,7 @@ public class CorePLAGenerator {
});
appendOP_eas(0x50c0, 0xf0c0, "scc_b", EA_MALT, "8", "op_scc_b_ds", null, (opcode, opmask, opname, n1, mode) -> {
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "op_scc_b_ea");
@ -558,7 +564,7 @@ public class CorePLAGenerator {
appendOP_eas(0x8000, 0xf1c0, "or_b", EA_FETCH | EA_ALL, "8", dyadic(gen, "or", "b", "ds", "dd"), null, (opcode, opmask, opname, n1, mode) -> {
opname = String.format("%s_dd", opname);
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", dyadic(gen, "or", "b", "ea", "dd"));
@ -567,7 +573,7 @@ public class CorePLAGenerator {
appendOP_eas(0x8040, 0xf1c0, "or_w", EA_FETCH | EA_ALL, "16", dyadic(gen, "or", "w", "ds", "dd"), null, (opcode, opmask, opname, n1, mode) -> {
opname = String.format("%s_dd", opname);
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", dyadic(gen, "or", "w", "ea", "dd"));
@ -576,7 +582,7 @@ public class CorePLAGenerator {
appendOP_eas(0x8080, 0xf1c0, "or_l", EA_FETCH | EA_ALL, "32", dyadic(gen, "or", "l", "ds", "dd"), null, (opcode, opmask, opname, n1, mode) -> {
opname = String.format("%s_dd", opname);
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", dyadic(gen, "or", "l", "ea", "dd"));
@ -599,7 +605,7 @@ public class CorePLAGenerator {
appendOP_eas(0x9000, 0xf1c0, "sub_b", EA_FETCH | EA_ALL, "8", dyadic(gen, "sub", "b", "ds", "dd"), null, (opcode, opmask, opname, n1, mode) -> {
opname = String.format("%s_dd", opname);
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", dyadic(gen, "sub", "b", "ea", "dd"));
@ -608,7 +614,7 @@ public class CorePLAGenerator {
appendOP_eas(0x9040, 0xf1c0, "sub_w", EA_FETCH | EA_ALL, "16", dyadic(gen, "sub", "w", "ds", "dd"), dyadic(gen, "sub", "w", "as", "dd"), (opcode, opmask, opname, n1, mode) -> {
opname = String.format("%s_dd", opname);
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", dyadic(gen, "sub", "w", "ea", "dd"));
@ -617,7 +623,7 @@ public class CorePLAGenerator {
appendOP_eas(0x9080, 0xf1c0, "sub_l", EA_FETCH | EA_ALL, "32", dyadic(gen, "sub", "l", "ds", "dd"), dyadic(gen, "sub", "l", "as", "dd"), (opcode, opmask, opname, n1, mode) -> {
opname = String.format("%s_dd", opname);
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", dyadic(gen, "sub", "l", "ea", "dd"));
@ -645,7 +651,7 @@ public class CorePLAGenerator {
appendOP_eas(0x90c0, 0xf1c0, "suba_w", EA_FETCH | EA_ALL, "16", dyadic(gen, "sub", "w", "ds", "ad"), dyadic(gen, "sub", "w", "as", "ad"), (opcode, opmask, opname, n1, mode) -> {
opname = String.format("%s_ad", opname);
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", dyadic(gen, "sub", "w", "ea", "ad"));
@ -654,7 +660,7 @@ public class CorePLAGenerator {
appendOP_eas(0x91c0, 0xf1c0, "suba_l", EA_FETCH | EA_ALL, "32", dyadic(gen, "sub", "l", "ds", "ad"), dyadic(gen, "sub", "l", "as", "ad"), (opcode, opmask, opname, n1, mode) -> {
opname = String.format("%s_ad", opname);
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", dyadic(gen, "sub", "l", "ea", "ad"));
@ -666,7 +672,7 @@ public class CorePLAGenerator {
appendOP_eas(0xb000, 0xf1c0, "cmp_b", EA_FETCH | EA_ALL, "8", dyadic(gen, "cmp", "b", "ds", "dd"), null, (opcode, opmask, opname, n1, mode) -> {
opname = String.format("%s_dd", opname);
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", dyadic(gen, "cmp", "b", "ea", "dd"));
@ -675,7 +681,7 @@ public class CorePLAGenerator {
appendOP_eas(0xb040, 0xf1c0, "cmp_w", EA_FETCH | EA_ALL, "16", dyadic(gen, "cmp", "w", "ds", "dd"), dyadic(gen, "cmp", "w", "as", "dd"), (opcode, opmask, opname, n1, mode) -> {
opname = String.format("%s_dd", opname);
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", dyadic(gen, "cmp", "w", "ea", "dd"));
@ -684,7 +690,7 @@ public class CorePLAGenerator {
appendOP_eas(0xb080, 0xf1c0, "cmp_l", EA_FETCH | EA_ALL, "32", dyadic(gen, "cmp", "l", "ds", "dd"), dyadic(gen, "cmp", "l", "as", "dd"), (opcode, opmask, opname, n1, mode) -> {
opname = String.format("%s_dd", opname);
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", dyadic(gen, "cmp", "l", "ea", "dd"));
@ -694,7 +700,7 @@ public class CorePLAGenerator {
appendOP_eas(0xb0c0, 0xf1c0, "cmpa_w", EA_FETCH | EA_ALL, "16", dyadic(gen, "cmp", "w", "ds", "ad"), dyadic(gen, "cmp", "w", "as", "ad"), (opcode, opmask, opname, n1, mode) -> {
opname = String.format("%s_ad", opname);
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", dyadic(gen, "cmp", "w", "ea", "ad"));
@ -703,7 +709,7 @@ public class CorePLAGenerator {
appendOP_eas(0xb1c0, 0xf1c0, "cmpa_l", EA_FETCH | EA_ALL, "32", dyadic(gen, "cmp", "l", "ds", "ad"), dyadic(gen, "cmp", "l", "as", "ad"), (opcode, opmask, opname, n1, mode) -> {
opname = String.format("%s_ad", opname);
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", dyadic(gen, "cmp", "l", "ea", "ad"));
@ -715,21 +721,21 @@ public class CorePLAGenerator {
appendOP(gen, entries, array, 0xb188, 0xf1f8, "cmpm_l_aips_aipd", "ea_aips32_read", dyadic(gen, "cmpm", "l", "ea", "ea"), "ea_aipd32_read");
appendOP_eas(0xb100, 0xf1c0, "eor_b_dd", EA_FETCH | EA_MALT, "8", dyadic(gen, "eor", "b", "dd", "ds"), null, (opcode, opmask, opname, n1, mode) -> {
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", dyadic(gen, "eor", "b", "dd", "ea"));
}
});
appendOP_eas(0xb140, 0xf1c0, "eor_w_dd", EA_FETCH | EA_MALT, "16", dyadic(gen, "eor", "w", "dd", "ds"), null, (opcode, opmask, opname, n1, mode) -> {
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", dyadic(gen, "eor", "w", "dd", "ea"));
}
});
appendOP_eas(0xb180, 0xf1c0, "eor_l_dd", EA_FETCH | EA_MALT, "32", dyadic(gen, "eor", "l", "dd", "ds"), null, (opcode, opmask, opname, n1, mode) -> {
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", dyadic(gen, "eor", "l", "dd", "ea"));
@ -739,7 +745,7 @@ public class CorePLAGenerator {
appendOP_eas(0xc000, 0xf1c0, "and_b", EA_FETCH | EA_ALL, "8", dyadic(gen, "and", "b", "ds", "dd"), null, (opcode, opmask, opname, n1, mode) -> {
opname = String.format("%s_dd", opname);
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", dyadic(gen, "and", "b", "ea", "dd"));
@ -748,7 +754,7 @@ public class CorePLAGenerator {
appendOP_eas(0xc040, 0xf1c0, "and_w", EA_FETCH | EA_ALL, "16", dyadic(gen, "and", "w", "ds", "dd"), null, (opcode, opmask, opname, n1, mode) -> {
opname = String.format("%s_dd", opname);
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", dyadic(gen, "and", "w", "ea", "dd"));
@ -757,7 +763,7 @@ public class CorePLAGenerator {
appendOP_eas(0xc080, 0xf1c0, "and_l", EA_FETCH | EA_ALL, "32", dyadic(gen, "and", "l", "ds", "dd"), null, (opcode, opmask, opname, n1, mode) -> {
opname = String.format("%s_dd", opname);
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", dyadic(gen, "and", "l", "ea", "dd"));
@ -769,21 +775,21 @@ public class CorePLAGenerator {
appendOP(gen, entries, array, 0xc188, 0xf1f8, "exg_dd_as", "op_exg_dd_as", "dbrr", "dbrr");
appendOP_eas(0xc100, 0xf1c0, "and_b_dd", EA_FETCH | EA_MALT, "8", (opcode, opmask, opname, n1, mode) -> {
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", dyadic(gen, "and", "b", "dd", "ea"));
}
});
appendOP_eas(0xc140, 0xf1c0, "and_w_dd", EA_FETCH | EA_MALT, "16", (opcode, opmask, opname, n1, mode) -> {
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", dyadic(gen, "and", "w", "dd", "ea"));
}
});
appendOP_eas(0xc180, 0xf1c0, "and_l_dd", EA_FETCH | EA_MALT, "32", (opcode, opmask, opname, n1, mode) -> {
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", dyadic(gen, "and", "l", "dd", "ea"));
@ -796,7 +802,7 @@ public class CorePLAGenerator {
appendOP_eas(0xd000, 0xf1c0, "add_b", EA_FETCH | EA_ALL, "8", dyadic(gen, "add", "b", "ds", "dd"), null, (opcode, opmask, opname, n1, mode) -> {
opname = String.format("%s_dd", opname);
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", dyadic(gen, "add", "b", "ea", "dd"));
@ -805,7 +811,7 @@ public class CorePLAGenerator {
appendOP_eas(0xd040, 0xf1c0, "add_w", EA_FETCH | EA_ALL, "16", dyadic(gen, "add", "w", "ds", "dd"), dyadic(gen, "add", "w", "as", "dd"), (opcode, opmask, opname, n1, mode) -> {
opname = String.format("%s_dd", opname);
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", dyadic(gen, "add", "w", "ea", "dd"));
@ -814,7 +820,7 @@ public class CorePLAGenerator {
appendOP_eas(0xd080, 0xf1c0, "add_l", EA_FETCH | EA_ALL, "32", dyadic(gen, "add", "l", "ds", "dd"), dyadic(gen, "add", "l", "as", "dd"), (opcode, opmask, opname, n1, mode) -> {
opname = String.format("%s_dd", opname);
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", dyadic(gen, "add", "l", "ea", "dd"));
@ -842,7 +848,7 @@ public class CorePLAGenerator {
appendOP_eas(0xd0c0, 0xf1c0, "adda_w", EA_FETCH | EA_ALL, "16", dyadic(gen, "add", "w", "ds", "ad"), dyadic(gen, "add", "w", "as", "ad"), (opcode, opmask, opname, n1, mode) -> {
opname = String.format("%s_ad", opname);
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", dyadic(gen, "add", "w", "ea", "ad"));
@ -851,7 +857,7 @@ public class CorePLAGenerator {
appendOP_eas(0xd1c0, 0xf1c0, "adda_l", EA_FETCH | EA_ALL, "32", dyadic(gen, "add", "l", "ds", "ad"), dyadic(gen, "add", "l", "as", "ad"), (opcode, opmask, opname, n1, mode) -> {
opname = String.format("%s_ad", opname);
if (mode == 0) {
if ((mode & EA_ALL ) == 0) {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr");
} else {
appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", dyadic(gen, "add", "l", "ea", "ad"));
@ -1066,11 +1072,11 @@ public class CorePLAGenerator {
public static void appendOP_ead(int opcode, int mask, String opname, int ea, String size, String ds, String as, EAConsumer consumer) {
if (ds != null) {
consumer.append((opcode & 0xfe3f) | 0x0000, (mask & 0xfe3f) | 0x01c0, String.format("%s_dd", opname), ds, 0x0000);
consumer.append((opcode & 0xfe3f) | 0x0000, (mask & 0xfe3f) | 0x01c0, String.format("%s_dd", opname), ds, EA_DS);
}
if (as != null) {
consumer.append((opcode & 0xfe3f) | 0x0040, (mask & 0xfe3f) | 0x01c0, String.format("%s_ad", opname), as, 0x0000);
consumer.append((opcode & 0xfe3f) | 0x0040, (mask & 0xfe3f) | 0x01c0, String.format("%s_ad", opname), as, EA_AS);
}
appendOP_ead(opcode, mask, opname, ea, size, consumer);
@ -1116,11 +1122,11 @@ public class CorePLAGenerator {
public static void appendOP_eas(int opcode, int mask, String opname, int ea, String size, String ds, String as, EAConsumer consumer) {
if (ds != null) {
consumer.append((opcode & 0xffc0) | 0x0000, (mask & 0xffc0) | 0x0038, String.format("%s_ds", opname), ds, 0x0000);
consumer.append((opcode & 0xffc0) | 0x0000, (mask & 0xffc0) | 0x0038, String.format("%s_ds", opname), ds, EA_DS);
}
if (as != null) {
consumer.append((opcode & 0xffc0) | 0x0008, (mask & 0xffc0) | 0x0038, String.format("%s_as", opname), as, 0x0000);
consumer.append((opcode & 0xffc0) | 0x0008, (mask & 0xffc0) | 0x0038, String.format("%s_as", opname), as, EA_AS);
}
appendOP_eas(opcode, mask, opname, ea, size, consumer);

File diff suppressed because it is too large Load diff

View file

@ -40,6 +40,7 @@ import static miggy.cpupoet.Core.ea_ais32;
import static miggy.cpupoet.Core.ea_ais32_read;
import static miggy.cpupoet.Core.ea_ais8;
import static miggy.cpupoet.Core.ea_ais8_read;
import static miggy.cpupoet.Core.ea_as_dt;
import static miggy.cpupoet.Core.ea_dad16;
import static miggy.cpupoet.Core.ea_dad32;
import static miggy.cpupoet.Core.ea_dad8;
@ -226,7 +227,6 @@ import static miggy.cpupoet.Core.gen_moveb_dt_dd;
import static miggy.cpupoet.Core.gen_moveb_dt_ea;
import static miggy.cpupoet.Core.gen_movel_as_ad;
import static miggy.cpupoet.Core.gen_movel_as_dd;
import static miggy.cpupoet.Core.gen_movel_as_ea;
import static miggy.cpupoet.Core.gen_movel_ds_ad;
import static miggy.cpupoet.Core.gen_movel_ds_dd;
import static miggy.cpupoet.Core.gen_movel_ds_ea;
@ -236,7 +236,6 @@ import static miggy.cpupoet.Core.gen_movel_dt_ea;
import static miggy.cpupoet.Core.gen_movel_im_dd;
import static miggy.cpupoet.Core.gen_movew_as_ad;
import static miggy.cpupoet.Core.gen_movew_as_dd;
import static miggy.cpupoet.Core.gen_movew_as_ea;
import static miggy.cpupoet.Core.gen_movew_ccr_ds;
import static miggy.cpupoet.Core.gen_movew_ccr_ea;
import static miggy.cpupoet.Core.gen_movew_ds_ad;
@ -1088,7 +1087,7 @@ public enum MacroPLA {
move_l_ds_aid(0x2080, 0xf1f8, ea_aid32, gen_movel_ds_ea, dbrr),
move_l_as_aid(0x2088, 0xf1f8, ea_aid32, gen_movel_as_ea, dbrr),
move_l_as_aid(0x2088, 0xf1f8, ea_as_dt, gen_movel_dt_ea, ea_aid32),
move_l_ais_aid(0x2090, 0xf1f8, ea_ais32_read, gen_movel_dt_ea, ea_aid32),
@ -1112,7 +1111,7 @@ public enum MacroPLA {
move_l_ds_aipd(0x20c0, 0xf1f8, ea_aipd32, gen_movel_ds_ea, dbrr),
move_l_as_aipd(0x20c8, 0xf1f8, ea_aipd32, gen_movel_as_ea, dbrr),
move_l_as_aipd(0x20c8, 0xf1f8, ea_as_dt, gen_movel_dt_ea, ea_aipd32),
move_l_ais_aipd(0x20d0, 0xf1f8, ea_ais32_read, gen_movel_dt_ea, ea_aipd32),
@ -1136,7 +1135,7 @@ public enum MacroPLA {
move_l_ds_paid(0x2100, 0xf1f8, ea_paid32, gen_movel_ds_ea, dbrr),
move_l_as_paid(0x2108, 0xf1f8, ea_paid32, gen_movel_as_ea, dbrr),
move_l_as_paid(0x2108, 0xf1f8, ea_as_dt, gen_movel_dt_ea, ea_paid32),
move_l_ais_paid(0x2110, 0xf1f8, ea_ais32_read, gen_movel_dt_ea, ea_paid32),
@ -1160,7 +1159,7 @@ public enum MacroPLA {
move_l_ds_dad(0x2140, 0xf1f8, ea_dad32, gen_movel_ds_ea, dbrr),
move_l_as_dad(0x2148, 0xf1f8, ea_dad32, gen_movel_as_ea, dbrr),
move_l_as_dad(0x2148, 0xf1f8, ea_as_dt, gen_movel_dt_ea, ea_dad32),
move_l_ais_dad(0x2150, 0xf1f8, ea_ais32_read, gen_movel_dt_ea, ea_dad32),
@ -1184,7 +1183,7 @@ public enum MacroPLA {
move_l_ds_daid(0x2180, 0xf1f8, ea_daid32, gen_movel_ds_ea, dbrr),
move_l_as_daid(0x2188, 0xf1f8, ea_daid32, gen_movel_as_ea, dbrr),
move_l_as_daid(0x2188, 0xf1f8, ea_as_dt, gen_movel_dt_ea, ea_daid32),
move_l_ais_daid(0x2190, 0xf1f8, ea_ais32_read, gen_movel_dt_ea, ea_daid32),
@ -1208,7 +1207,7 @@ public enum MacroPLA {
move_l_ds_adr16(0x21c0, 0xfff8, ea_adr16d32, gen_movel_ds_ea, dbrr),
move_l_as_adr16(0x21c8, 0xfff8, ea_adr16d32, gen_movel_as_ea, dbrr),
move_l_as_adr16(0x21c8, 0xfff8, ea_as_dt, gen_movel_dt_ea, ea_adr16d32),
move_l_ais_adr16(0x21d0, 0xfff8, ea_ais32_read, gen_movel_dt_ea, ea_adr16d32),
@ -1232,7 +1231,7 @@ public enum MacroPLA {
move_l_ds_adr32(0x23c0, 0xfff8, ea_adr32d32, gen_movel_ds_ea, dbrr),
move_l_as_adr32(0x23c8, 0xfff8, ea_adr32d32, gen_movel_as_ea, dbrr),
move_l_as_adr32(0x23c8, 0xfff8, ea_as_dt, gen_movel_dt_ea, ea_adr32d32),
move_l_ais_adr32(0x23d0, 0xfff8, ea_ais32_read, gen_movel_dt_ea, ea_adr32d32),
@ -1304,7 +1303,7 @@ public enum MacroPLA {
move_w_ds_aid(0x3080, 0xf1f8, ea_aid16, gen_movew_ds_ea, dbrr),
move_w_as_aid(0x3088, 0xf1f8, ea_aid16, gen_movew_as_ea, dbrr),
move_w_as_aid(0x3088, 0xf1f8, ea_as_dt, gen_movew_dt_ea, ea_aid16),
move_w_ais_aid(0x3090, 0xf1f8, ea_ais16_read, gen_movew_dt_ea, ea_aid16),
@ -1328,7 +1327,7 @@ public enum MacroPLA {
move_w_ds_aipd(0x30c0, 0xf1f8, ea_aipd16, gen_movew_ds_ea, dbrr),
move_w_as_aipd(0x30c8, 0xf1f8, ea_aipd16, gen_movew_as_ea, dbrr),
move_w_as_aipd(0x30c8, 0xf1f8, ea_as_dt, gen_movew_dt_ea, ea_aipd16),
move_w_ais_aipd(0x30d0, 0xf1f8, ea_ais16_read, gen_movew_dt_ea, ea_aipd16),
@ -1352,7 +1351,7 @@ public enum MacroPLA {
move_w_ds_paid(0x3100, 0xf1f8, ea_paid16, gen_movew_ds_ea, dbrr),
move_w_as_paid(0x3108, 0xf1f8, ea_paid16, gen_movew_as_ea, dbrr),
move_w_as_paid(0x3108, 0xf1f8, ea_as_dt, gen_movew_dt_ea, ea_paid16),
move_w_ais_paid(0x3110, 0xf1f8, ea_ais16_read, gen_movew_dt_ea, ea_paid16),
@ -1376,7 +1375,7 @@ public enum MacroPLA {
move_w_ds_dad(0x3140, 0xf1f8, ea_dad16, gen_movew_ds_ea, dbrr),
move_w_as_dad(0x3148, 0xf1f8, ea_dad16, gen_movew_as_ea, dbrr),
move_w_as_dad(0x3148, 0xf1f8, ea_as_dt, gen_movew_dt_ea, ea_dad16),
move_w_ais_dad(0x3150, 0xf1f8, ea_ais16_read, gen_movew_dt_ea, ea_dad16),
@ -1400,7 +1399,7 @@ public enum MacroPLA {
move_w_ds_daid(0x3180, 0xf1f8, ea_daid16, gen_movew_ds_ea, dbrr),
move_w_as_daid(0x3188, 0xf1f8, ea_daid16, gen_movew_as_ea, dbrr),
move_w_as_daid(0x3188, 0xf1f8, ea_as_dt, gen_movew_dt_ea, ea_daid16),
move_w_ais_daid(0x3190, 0xf1f8, ea_ais16_read, gen_movew_dt_ea, ea_daid16),
@ -1424,7 +1423,7 @@ public enum MacroPLA {
move_w_ds_adr16(0x31c0, 0xfff8, ea_adr16d16, gen_movew_ds_ea, dbrr),
move_w_as_adr16(0x31c8, 0xfff8, ea_adr16d16, gen_movew_as_ea, dbrr),
move_w_as_adr16(0x31c8, 0xfff8, ea_as_dt, gen_movew_dt_ea, ea_adr16d16),
move_w_ais_adr16(0x31d0, 0xfff8, ea_ais16_read, gen_movew_dt_ea, ea_adr16d16),
@ -1448,7 +1447,7 @@ public enum MacroPLA {
move_w_ds_adr32(0x33c0, 0xfff8, ea_adr32d16, gen_movew_ds_ea, dbrr),
move_w_as_adr32(0x33c8, 0xfff8, ea_adr32d16, gen_movew_as_ea, dbrr),
move_w_as_adr32(0x33c8, 0xfff8, ea_as_dt, gen_movew_dt_ea, ea_adr32d16),
move_w_ais_adr32(0x33d0, 0xfff8, ea_ais16_read, gen_movew_dt_ea, ea_adr32d16),

View file

@ -169,16 +169,8 @@ public class InstructionTests extends TestCase {
CoreTest test = new CoreTest(0xffffff + 1, true);
test.executeBinTest("MOVE.b");
/*
* skipped cases are incompatible (move address register to pre/post
* dec/increment with same address register)
*/
test.executeBinTest("MOVE.w", 295, 342, 494, 994, 1225, 1846);
/*
* skipped cases are incompatible (move address register to pre/post
* dec/increment with same address register)
*/
test.executeBinTest("MOVE.l", 217, 502, 1152, 1691, 1830, 2057, 2135);
test.executeBinTest("MOVE.w");
test.executeBinTest("MOVE.l");
test.executeBinTest("MOVE.q");
test.executeBinTest("MOVEP.w");