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119 lines
3.6 KiB
Markdown
119 lines
3.6 KiB
Markdown
[← Home](../../README.md) · [Hardware](../README.md) · [ECS](README.md)
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# ECS Chipset Internals — Super Agnus & ECS Denise
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## Super Agnus (MOS 8372A)
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### Chip RAM Addressing
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OCS Agnus could only generate 19-bit DMA addresses (512 KB) or 20-bit (1 MB with Fat Agnus). Super Agnus extends this to **21 bits**, addressing 2 MB of Chip RAM. See [OCS Chipset Internals](../ocs_a500/chipset_ocs.md) for the original Agnus DMA architecture.
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The revision of Super Agnus present determines the Chip RAM limit:
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| Part | Chip RAM Max | Marking |
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|---|---|---|
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| 8372A rev 1 | 1 MB | AGNUS 8372A |
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| 8372A rev 4+ | 2 MB | AGNUS 8372A (2MB) |
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> [!NOTE]
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> Software cannot assume 2 MB Chip RAM is available just because Super Agnus is present. The actual installed RAM amount must be checked via `AvailMem(MEMF_CHIP)`.
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### Extended DMA Window
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Super Agnus extends the bitplane DMA fetch window, allowing:
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- Full overscan displays without copper tricks
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- Access to the full 2 MB address range for all DMA channels
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### AGNUS ID Register
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Super Agnus provides an ID register readable via the `VPOSR` / `DIWSTRT` path. The chip revision can be read:
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```asm
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move.w VPOSR+custom, d0 ; read VPOSR
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lsr.w #8, d0 ; shift to get Agnus ID in low byte
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```
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| VPOSR[15:8] | Chip | Notes |
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|---|---|---|
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| $00 | OCS Agnus 8367/8361 | Original |
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| $10 | OCS Fat Agnus 8371 | 1 MB PAL |
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| $20 | Super Agnus 8372A | ECS, 1 or 2 MB |
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| $30 | Super Agnus 8372B | Some ECS |
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---
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## ECS Denise (MOS 8373)
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### New Capabilities
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ECS Denise adds to OCS Denise (8362):
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1. **BPLCON3** — new control register for border color, sprite bank
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2. **Sub-pixel scrolling** — additional scroll control bits
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3. **Genlock extensions** — improved external sync handling
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4. **Border blank** — BPLCON3 can blank the border area to color 0
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### DENISEID — Revision Register
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ECS Denise provides a self-identification register at `$DFF07C` (read only on ECS+):
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```asm
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move.w $DFF07C, d0 ; read DENISEID
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```
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| Value | Chip |
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|---|---|
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| $FFFF | OCS Denise 8362 (register not present) |
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| $00FC | ECS Denise 8373 |
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| $00F8 | AGA Lisa |
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---
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## BPLCON3 — ECS Denise Extension
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New register at `$DFF106` (ECS only, must not be written on OCS):
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```
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bit 15-13: BANK2-0 — sprite color bank (AGA: upper 4 bits of color reg)
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bit 12-10: PF2OF2-0 — playfield 2 color offset (for dual playfield)
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bit 9: LOCT — low color enable (AGA HAM8 mode)
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bit 6: BRDRBLNK — border blank: forces border area to color 0
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bit 5: BRDNTRAN — border not-transparent (disable border transparency)
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bit 4: ZDCLKEN — horizontal/vertical count display
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bit 3: BRDSPRT — sprites in border area enable
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bit 2: EXTBLKEN — external blank signal
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```
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**Border blank use:**
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```asm
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move.w #$0020, $DFF106 ; set BRDRBLNK — blank border area
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```
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---
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## GfxBase ChipRevBits0 Flags
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```c
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/* graphics/gfxbase.h */
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#define GFXB_BIG_BLITTER 0 /* ECS big blitter present */
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#define GFXB_BLITTER_DMA 1
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#define GFXB_HR_AGNUS 2 /* Super Agnus */
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#define GFXB_HR_DENISE 3 /* ECS Denise */
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#define GFXB_AA_ALICE 4 /* AGA Alice */
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#define GFXB_AA_LISA 5 /* AGA Lisa */
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```
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Reading chipset type in C:
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```c
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UBYTE rev = GfxBase->ChipRevBits0;
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BOOL is_ecs_agnus = (rev & (1 << GFXB_HR_AGNUS)) != 0;
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BOOL is_ecs_denise = (rev & (1 << GFXB_HR_DENISE)) != 0;
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BOOL is_aga = (rev & (1 << GFXB_AA_ALICE)) != 0;
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```
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## References
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- ADCD 2.1 Hardware Manual — ECS registers, Super Agnus chapter
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- NDK39: `graphics/gfxbase.h`
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- AmigaMail Vol. 2 — ECS chipset programming articles
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- *Amiga Hardware Reference Manual* 3rd ed. — Appendix F (ECS)
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