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amiga-bootcamp/01_hardware/README.md
Ilia Sharin c4522ef2ed Add memory types article, expand blitter cookbook, update cross-references 
New articles:
- 01_hardware/common/memory_types.md: comprehensive Chip/Fast/Slow RAM reference
  with DMA accessibility matrix, per-model configurations (A500-A4000),
  accelerator memory expansion (classic + modern), adaptive software behavior,
  pitfalls with impact analysis, FPGA/emulation notes
- AGENTS.md: documentation standards and methodology guidelines

Blitter programming (08_graphics/blitter_programming.md):
- Rewrote minterm truth table with narrative explanation and worked  example
- Added 7 advanced use cases with assembly/C code: shifted BOB, hardware scroll,
  area fill polygon, interleaved bitplane BOBs, double-buffered game loop,
  GUI window drag, tile map renderer
- Added Good/Bad Patterns section with 5 named antipatterns
- Added Practical Limitations table (10 constraints with workarounds)
- Expanded Common Minterms table with Description and Real-World Use Case columns

Cross-reference updates:
- Root README: added memory types to coverage, quick start, section index
- 01_hardware/README: updated common/ folder description
- address_space.md: linked to memory_types.md and chip_ram_expansion.md
- memory_management.md (exec): linked to hardware memory types reference
- bitmap.md, sprites.md, animation.md, audio.md: linked to memory_types.md
  explaining DMA Chip RAM requirement for each subsystem
- chip_ram_expansion.md: linked to comprehensive memory types article
2026-04-25 14:12:46 -04:00

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Hardware — Chipset Generation Overview

Generation Comparison

Feature OCS ECS AGA
Agnus 8361/8367 8372A (Super Agnus) Alice (8374)
Denise 8362 8373 (ECS Denise) Lisa
Paula 8364 8364 (unchanged) 8364 (unchanged)
Max Chip RAM 512 KB–1 MB 1–2 MB 2 MB
Colours (max normal) 32 32 256
HAM 12-bit HAM (6bpp) 12-bit HAM 24-bit HAM8 (8bpp)
Sprites 8 × 16px 8 × 16px 8 × 64px, 256 colours
Blitter bus 16-bit 16-bit 64-bit (FMODE)
Display modes NTSC/PAL +Productivity, VGA +Doublescan, 31kHz
Machines A500/A1000/A2000 A600/A3000/A500+ A1200/A4000/CD32

Custom Register Address Space

All chipset generations share the base address $00DFF000 for custom registers. Registers are memory-mapped, mostly 16-bit wide.

$DFF000  BLTDDAT   Blitter destination early read
$DFF002  DMACONR   DMA control (read)
$DFF004  VPOSR     Vertical position (read, high)
...
$DFF180  COLOR00   Colour register 0
...
$DFF1FE  (last OCS/ECS register)
$DFF1FC  BEAMCON0  (ECS+) beam control
$DFF1FC+ (AGA extensions)

See custom_registers_full.md for the complete table across all chipsets.

Navigation

Subfolder Content
common/ M68k CPU, address space layout, memory types (Chip/Fast/Slow), CIA chips, Zorro bus
ocs_a500/ OCS chipset — A500, A1000, A2000
ecs_a600_a3000/ ECS chipset — A600, A3000, A500+
aga_a1200_a4000/ AGA chipset — A1200, A4000, CD32

References