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Comprehensive technical documentation covering: - Hardware: OCS/ECS/AGA custom chip registers, Copper & Blitter deep dives - Boot sequence: cold boot through startup-sequence - Binary format: HUNK executable spec, relocation, debug info - Linking & ABI: .fd files, LVO tables, register calling conventions - Exec kernel: tasks, interrupts, memory, signals, semaphores - AmigaDOS: file I/O, FFS/OFS layout, CLI/Shell scripting - Graphics: planar bitmaps, Copper programming, HAM/EHB modes - Intuition: screens, windows, IDCMP, BOOPSI - Devices: trackdisk, SCSI, serial, timer, audio, keyboard - Libraries: utility, expansion, IFFParse, locale, ARexx - Networking: bsdsocket API, SANA-II, TCP/IP stack comparison - Toolchain: GCC, vasm/vlink, SAS/C, NDK, debugging - Reverse engineering: IDA/Ghidra setup, compiler fingerprints, case studies - CPU & MMU: 68040/060 emulation libs, PMMU, cache management - Driver development: SANA-II, Picasso96/RTG, AHI audio All files include breadcrumb navigation. No local paths or proprietary content.
154 lines
4.5 KiB
Markdown
154 lines
4.5 KiB
Markdown
[← Home](../../README.md) · [Hardware](../README.md) · [OCS](README.md)
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# Blitter
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## Overview
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The **Blitter** (Block Image Transferrer) is a DMA-driven coprocessor inside Agnus. It performs block copy, fill, and line-draw operations directly on Chip RAM without CPU involvement, at DMA bus speed.
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## Channels
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The Blitter has four channels:
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| Channel | Role | Register Pointer |
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|---|---|---|
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| **A** | Source (with mask) | BLTAPTH/BLTAPTL |
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| **B** | Source (with shift) | BLTBPTH/BLTBPTL |
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| **C** | Source (destination content) | BLTCPTH/BLTCPTL |
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| **D** | Destination | BLTDPTH/BLTDPTL |
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Any channel can be disabled per operation. The result written to D is computed as a **minterm** (boolean function) of A, B, C.
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## BLTCON0 — Control Register 0
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```
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bit 15-8: USEA, USEB, USEC, USED (enable channels A/B/C/D)
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bit 7-0: LF (Logic Function / minterm) — 8-bit truth table
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Bit = result bit for combination of A,B,C
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Bit 7: !A!B!C
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Bit 6: A!B!C
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Bit 5: !AB!C
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Bit 4: AB!C
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Bit 3: !A!BC
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Bit 2: A!BC
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Bit 1: !ABC
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Bit 0: ABC
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```
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### Common Minterm Values
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| Minterm | Hex | Operation |
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|---|---|---|
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| D = A AND B | $C0 | Mask copy |
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| D = A | $F0 | Simple copy (A only) |
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| D = A OR C | $FC | Overlay (A onto C) |
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| D = A XOR C | $3C | XOR blit |
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| D = NOT A | $0F | Invert A |
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| D = (A AND B) OR (!A AND C) | $CA | Cookie-cut (transparency) |
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### Cookie-Cut Example
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Cookie-cut (transparent sprite blit):
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```asm
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; A = mask (1=opaque, 0=transparent)
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; B = sprite data
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; C = background
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; D = result: background where mask=0, sprite where mask=1
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; Minterm: D = (A AND B) OR (!A AND C) = $CA
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move.w #$09F0, BLTCON0 ; USE A,B,C,D; minterm=$CA
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move.w #$0000, BLTCON1
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```
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## BLTCON1 — Control Register 1
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```
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bit 15: DOFF — disable D write (dry run for fill detection)
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bit 4: IFE — inclusive fill enable
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bit 3: EFE — exclusive fill enable
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bit 2: FCI — fill carry in (start state)
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bit 1: DESC — descending mode (blit from bottom-right)
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bit 0: LINE — line draw mode
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```
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## BLTSIZE — Start Blitter
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```
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BLTSIZE = (height << 6) | width_in_words
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```
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Writing to BLTSIZE starts the blit operation immediately. The blitter holds the bus until complete.
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Example — blit 16×16 pixels (1 word wide, 16 lines):
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```asm
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move.w #((16<<6)|1), BLTSIZE
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```
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Example — blit 320×256 (20 words wide, 256 lines):
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```asm
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move.w #((256<<6)|20), BLTSIZE
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```
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## Modulo Registers
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Modulo is the number of **bytes** to skip at the end of each row (to move to the start of the next row in a larger bitmap):
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```
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BLTxMOD = (bytes_per_row_in_bitmap) - (width_of_blit_in_bytes)
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```
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For a 320-pixel wide (40-byte row) bitmap, blitting a 32-pixel (4-byte) wide section:
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```
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Modulo = 40 - 4 = 36
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```
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## First/Last Word Masks
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`BLTAFWM` (first word mask) and `BLTALWM` (last word mask) mask the A channel for the first and last word of each blit row, allowing sub-word-aligned blitting.
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For a fully aligned blit with no partial words:
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```asm
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move.w #$FFFF, BLTAFWM
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move.w #$FFFF, BLTALWM
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```
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## Line Draw Mode (BLTCON1 bit 0)
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In line mode, the blitter draws a line between two points using the Bresenham algorithm:
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- A channel provides the single pixel pattern (usually $8000 for MSB)
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- D channel is the destination bitmap
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- BLTSIZE specifies the line length (height=octant length, width=2)
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- BLTCON1 encodes octant, sign flags, and texture data
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Line mode is used by `graphics.library` `Draw()` calls internally.
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## Fill Mode (BLTCON1 IFE/EFE)
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**Exclusive fill (EFE):** Each set bit toggles the fill state — produces XOR fill (like polygon rasterisation).
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**Inclusive fill (IFE):** Set bit turns fill on, stays on until end of row — used for solid polygon fill.
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Fill operates in D channel only (no source channels active). BLTCON1 `DESC` bit = 1 when filling bottom-up.
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## Waiting for Blitter Completion
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```asm
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; Busy-wait on BLTCON0 busy bit
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WaitBlit:
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btst #6, DMACONR+1 ; test BBUSY bit (bit 14 of DMACONR, byte=bit6)
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bne.s WaitBlit
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```
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Or via exec (preferred):
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```c
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WaitBlit(); /* graphics.library — waits and resets to safe state */
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```
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> [!CAUTION]
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> Never start a blit while the blitter is busy. Always call `WaitBlit()` or poll `DMACONR[BBUSY]` before setting up new blit registers.
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## References
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- ADCD 2.1 Hardware Manual — Blitter chapter
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- NDK39: `hardware/blit.h`, `graphics/blitattr.h`
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- graphics.library Autodocs: `BltBitMap`, `BltTemplate`, `BltClear`
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- http://amigadev.elowar.com/read/ADCD_2.1/Hardware_Manual_guide/node006D.html
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