diff --git a/miggy-emu/src/main/java/miggy/cpu/genpoet/CorePLAGenerator.java b/miggy-emu/src/main/java/miggy/cpu/genpoet/CorePLAGenerator.java index b8eceb4..dc16214 100644 --- a/miggy-emu/src/main/java/miggy/cpu/genpoet/CorePLAGenerator.java +++ b/miggy-emu/src/main/java/miggy/cpu/genpoet/CorePLAGenerator.java @@ -334,7 +334,7 @@ public class CorePLAGenerator { if (mode == 0) { appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", "dbrr"); } else { - appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", monadic(gen, "neg", "l", "ea")); + appendOP(gen, entries, array, opcode, opmask, opname, n1, "dbrr", monadic(gen, "neg", "w", "ea")); } }); appendOP_eas(0x4480, 0xffc0, "neg_l", EA_FETCH | EA_MALT, "32", monadic(gen, "neg", "l", "ds"), null, (opcode, opmask, opname, n1, mode) -> { diff --git a/miggy-emu/src/main/java/miggy/cpupoet/Core.java b/miggy-emu/src/main/java/miggy/cpupoet/Core.java index 08312af..e35771e 100644 --- a/miggy-emu/src/main/java/miggy/cpupoet/Core.java +++ b/miggy-emu/src/main/java/miggy/cpupoet/Core.java @@ -655,337 +655,339 @@ public abstract class Core extends CoreALU { protected static final int gen_negw_ds = 442; - protected static final int gen_negl_ea = 443; + protected static final int gen_negw_ea = 443; protected static final int gen_negl_ds = 444; - protected static final int gen_notb_ds = 445; + protected static final int gen_negl_ea = 445; - protected static final int gen_notb_ea = 446; + protected static final int gen_notb_ds = 446; - protected static final int gen_notw_ds = 447; + protected static final int gen_notb_ea = 447; - protected static final int gen_notw_ea = 448; + protected static final int gen_notw_ds = 448; - protected static final int gen_notl_ds = 449; + protected static final int gen_notw_ea = 449; - protected static final int gen_notl_ea = 450; + protected static final int gen_notl_ds = 450; - protected static final int gen_nbcdb_ds = 451; + protected static final int gen_notl_ea = 451; - protected static final int gen_nbcdb_ea = 452; + protected static final int gen_nbcdb_ds = 452; - protected static final int gen_tstb_ds = 453; + protected static final int gen_nbcdb_ea = 453; - protected static final int gen_tstb_ea = 454; + protected static final int gen_tstb_ds = 454; - protected static final int gen_tstw_ds = 455; + protected static final int gen_tstb_ea = 455; - protected static final int gen_tstw_ea = 456; + protected static final int gen_tstw_ds = 456; - protected static final int gen_tstl_ds = 457; + protected static final int gen_tstw_ea = 457; - protected static final int gen_tstl_ea = 458; + protected static final int gen_tstl_ds = 458; - protected static final int gen_addb_ir_ds = 459; + protected static final int gen_tstl_ea = 459; - protected static final int gen_addb_ir_ea = 460; + protected static final int gen_addb_ir_ds = 460; - protected static final int gen_addw_ir_ds = 461; + protected static final int gen_addb_ir_ea = 461; - protected static final int gen_addw_ir_as = 462; + protected static final int gen_addw_ir_ds = 462; - protected static final int gen_addw_ir_ea = 463; + protected static final int gen_addw_ir_as = 463; - protected static final int gen_addl_ir_ds = 464; + protected static final int gen_addw_ir_ea = 464; - protected static final int gen_addl_ir_as = 465; + protected static final int gen_addl_ir_ds = 465; - protected static final int gen_addl_ir_ea = 466; + protected static final int gen_addl_ir_as = 466; - protected static final int gen_subb_ir_ds = 467; + protected static final int gen_addl_ir_ea = 467; - protected static final int gen_subb_ir_ea = 468; + protected static final int gen_subb_ir_ds = 468; - protected static final int gen_subw_ir_ds = 469; + protected static final int gen_subb_ir_ea = 469; - protected static final int gen_subw_ir_as = 470; + protected static final int gen_subw_ir_ds = 470; - protected static final int gen_subw_ir_ea = 471; + protected static final int gen_subw_ir_as = 471; - protected static final int gen_subl_ir_ds = 472; + protected static final int gen_subw_ir_ea = 472; - protected static final int gen_subl_ir_as = 473; + protected static final int gen_subl_ir_ds = 473; - protected static final int gen_subl_ir_ea = 474; + protected static final int gen_subl_ir_as = 474; - protected static final int gen_movel_im_dd = 475; + protected static final int gen_subl_ir_ea = 475; - protected static final int gen_orb_ds_dd = 476; + protected static final int gen_movel_im_dd = 476; - protected static final int gen_orb_dt_dd = 477; + protected static final int gen_orb_ds_dd = 477; - protected static final int gen_orw_ds_dd = 478; + protected static final int gen_orb_dt_dd = 478; - protected static final int gen_orw_dt_dd = 479; + protected static final int gen_orw_ds_dd = 479; - protected static final int gen_orl_ds_dd = 480; + protected static final int gen_orw_dt_dd = 480; - protected static final int gen_orl_dt_dd = 481; + protected static final int gen_orl_ds_dd = 481; - protected static final int gen_sbcdb_ds_dd = 482; + protected static final int gen_orl_dt_dd = 482; - protected static final int gen_sbcdb_im_ea = 483; + protected static final int gen_sbcdb_ds_dd = 483; - protected static final int gen_orb_dd_ea = 484; + protected static final int gen_sbcdb_im_ea = 484; - protected static final int gen_orw_dd_ea = 485; + protected static final int gen_orb_dd_ea = 485; - protected static final int gen_orl_dd_ea = 486; + protected static final int gen_orw_dd_ea = 486; - protected static final int gen_subb_ds_dd = 487; + protected static final int gen_orl_dd_ea = 487; - protected static final int gen_subb_dt_dd = 488; + protected static final int gen_subb_ds_dd = 488; - protected static final int gen_subw_ds_dd = 489; + protected static final int gen_subb_dt_dd = 489; - protected static final int gen_subw_as_dd = 490; + protected static final int gen_subw_ds_dd = 490; - protected static final int gen_subw_dt_dd = 491; + protected static final int gen_subw_as_dd = 491; - protected static final int gen_subl_ds_dd = 492; + protected static final int gen_subw_dt_dd = 492; - protected static final int gen_subl_as_dd = 493; + protected static final int gen_subl_ds_dd = 493; - protected static final int gen_subl_dt_dd = 494; + protected static final int gen_subl_as_dd = 494; - protected static final int gen_subb_dd_ea = 495; + protected static final int gen_subl_dt_dd = 495; - protected static final int gen_subw_dd_ea = 496; + protected static final int gen_subb_dd_ea = 496; - protected static final int gen_subl_dd_ea = 497; + protected static final int gen_subw_dd_ea = 497; - protected static final int gen_subxb_ds_dd = 498; + protected static final int gen_subl_dd_ea = 498; - protected static final int gen_subxb_im_ea = 499; + protected static final int gen_subxb_ds_dd = 499; - protected static final int gen_subxw_ds_dd = 500; + protected static final int gen_subxb_im_ea = 500; - protected static final int gen_subxw_im_ea = 501; + protected static final int gen_subxw_ds_dd = 501; - protected static final int gen_subxl_ds_dd = 502; + protected static final int gen_subxw_im_ea = 502; - protected static final int gen_subxl_im_ea = 503; + protected static final int gen_subxl_ds_dd = 503; - protected static final int gen_subw_ds_ad = 504; + protected static final int gen_subxl_im_ea = 504; - protected static final int gen_subw_as_ad = 505; + protected static final int gen_subw_ds_ad = 505; - protected static final int gen_subw_dt_ad = 506; + protected static final int gen_subw_as_ad = 506; - protected static final int gen_subl_ds_ad = 507; + protected static final int gen_subw_dt_ad = 507; - protected static final int gen_subl_as_ad = 508; + protected static final int gen_subl_ds_ad = 508; - protected static final int gen_subl_dt_ad = 509; + protected static final int gen_subl_as_ad = 509; - protected static final int gen_cmpb_ds_dd = 510; + protected static final int gen_subl_dt_ad = 510; - protected static final int gen_cmpb_dt_dd = 511; + protected static final int gen_cmpb_ds_dd = 511; - protected static final int gen_cmpw_ds_dd = 512; + protected static final int gen_cmpb_dt_dd = 512; - protected static final int gen_cmpw_as_dd = 513; + protected static final int gen_cmpw_ds_dd = 513; - protected static final int gen_cmpw_dt_dd = 514; + protected static final int gen_cmpw_as_dd = 514; - protected static final int gen_cmpl_ds_dd = 515; + protected static final int gen_cmpw_dt_dd = 515; - protected static final int gen_cmpl_as_dd = 516; + protected static final int gen_cmpl_ds_dd = 516; - protected static final int gen_cmpl_dt_dd = 517; + protected static final int gen_cmpl_as_dd = 517; - protected static final int gen_cmpw_ds_ad = 518; + protected static final int gen_cmpl_dt_dd = 518; - protected static final int gen_cmpw_as_ad = 519; + protected static final int gen_cmpw_ds_ad = 519; - protected static final int gen_cmpw_dt_ad = 520; + protected static final int gen_cmpw_as_ad = 520; - protected static final int gen_cmpl_ds_ad = 521; + protected static final int gen_cmpw_dt_ad = 521; - protected static final int gen_cmpl_as_ad = 522; + protected static final int gen_cmpl_ds_ad = 522; - protected static final int gen_cmpl_dt_ad = 523; + protected static final int gen_cmpl_as_ad = 523; - protected static final int gen_cmpmb_im_ea = 524; + protected static final int gen_cmpl_dt_ad = 524; - protected static final int gen_cmpmw_im_ea = 525; + protected static final int gen_cmpmb_im_ea = 525; - protected static final int gen_cmpml_im_ea = 526; + protected static final int gen_cmpmw_im_ea = 526; - protected static final int gen_eorb_dd_ds = 527; + protected static final int gen_cmpml_im_ea = 527; - protected static final int gen_eorb_dd_ea = 528; + protected static final int gen_eorb_dd_ds = 528; - protected static final int gen_eorw_dd_ds = 529; + protected static final int gen_eorb_dd_ea = 529; - protected static final int gen_eorw_dd_ea = 530; + protected static final int gen_eorw_dd_ds = 530; - protected static final int gen_eorl_dd_ds = 531; + protected static final int gen_eorw_dd_ea = 531; - protected static final int gen_eorl_dd_ea = 532; + protected static final int gen_eorl_dd_ds = 532; - protected static final int gen_andb_ds_dd = 533; + protected static final int gen_eorl_dd_ea = 533; - protected static final int gen_andb_dt_dd = 534; + protected static final int gen_andb_ds_dd = 534; - protected static final int gen_andw_ds_dd = 535; + protected static final int gen_andb_dt_dd = 535; - protected static final int gen_andw_dt_dd = 536; + protected static final int gen_andw_ds_dd = 536; - protected static final int gen_andl_ds_dd = 537; + protected static final int gen_andw_dt_dd = 537; - protected static final int gen_andl_dt_dd = 538; + protected static final int gen_andl_ds_dd = 538; - protected static final int gen_andb_dd_ea = 539; + protected static final int gen_andl_dt_dd = 539; - protected static final int gen_andw_dd_ea = 540; + protected static final int gen_andb_dd_ea = 540; - protected static final int gen_andl_dd_ea = 541; + protected static final int gen_andw_dd_ea = 541; - protected static final int gen_abcdb_ds_dd = 542; + protected static final int gen_andl_dd_ea = 542; - protected static final int gen_abcdb_im_ea = 543; + protected static final int gen_abcdb_ds_dd = 543; - protected static final int gen_addb_ds_dd = 544; + protected static final int gen_abcdb_im_ea = 544; - protected static final int gen_addb_dt_dd = 545; + protected static final int gen_addb_ds_dd = 545; - protected static final int gen_addw_ds_dd = 546; + protected static final int gen_addb_dt_dd = 546; - protected static final int gen_addw_as_dd = 547; + protected static final int gen_addw_ds_dd = 547; - protected static final int gen_addw_dt_dd = 548; + protected static final int gen_addw_as_dd = 548; - protected static final int gen_addl_ds_dd = 549; + protected static final int gen_addw_dt_dd = 549; - protected static final int gen_addl_as_dd = 550; + protected static final int gen_addl_ds_dd = 550; - protected static final int gen_addl_dt_dd = 551; + protected static final int gen_addl_as_dd = 551; - protected static final int gen_addb_dd_ea = 552; + protected static final int gen_addl_dt_dd = 552; - protected static final int gen_addw_dd_ea = 553; + protected static final int gen_addb_dd_ea = 553; - protected static final int gen_addl_dd_ea = 554; + protected static final int gen_addw_dd_ea = 554; - protected static final int gen_addxb_ds_dd = 555; + protected static final int gen_addl_dd_ea = 555; - protected static final int gen_addxb_im_ea = 556; + protected static final int gen_addxb_ds_dd = 556; - protected static final int gen_addxw_ds_dd = 557; + protected static final int gen_addxb_im_ea = 557; - protected static final int gen_addxw_im_ea = 558; + protected static final int gen_addxw_ds_dd = 558; - protected static final int gen_addxl_ds_dd = 559; + protected static final int gen_addxw_im_ea = 559; - protected static final int gen_addxl_im_ea = 560; + protected static final int gen_addxl_ds_dd = 560; - protected static final int gen_addw_ds_ad = 561; + protected static final int gen_addxl_im_ea = 561; - protected static final int gen_addw_as_ad = 562; + protected static final int gen_addw_ds_ad = 562; - protected static final int gen_addw_dt_ad = 563; + protected static final int gen_addw_as_ad = 563; - protected static final int gen_addl_ds_ad = 564; + protected static final int gen_addw_dt_ad = 564; - protected static final int gen_addl_as_ad = 565; + protected static final int gen_addl_ds_ad = 565; - protected static final int gen_addl_dt_ad = 566; + protected static final int gen_addl_as_ad = 566; - protected static final int gen_asrb_ir_ds = 567; + protected static final int gen_addl_dt_ad = 567; - protected static final int gen_asrb_dd_ds = 568; + protected static final int gen_asrb_ir_ds = 568; - protected static final int gen_asrw_ir_ds = 569; + protected static final int gen_asrb_dd_ds = 569; - protected static final int gen_asrw_dd_ds = 570; + protected static final int gen_asrw_ir_ds = 570; - protected static final int gen_asrl_ir_ds = 571; + protected static final int gen_asrw_dd_ds = 571; - protected static final int gen_asrl_dd_ds = 572; + protected static final int gen_asrl_ir_ds = 572; - protected static final int gen_asrw_ea = 573; + protected static final int gen_asrl_dd_ds = 573; - protected static final int gen_aslb_ir_ds = 574; + protected static final int gen_asrw_ea = 574; - protected static final int gen_aslb_dd_ds = 575; + protected static final int gen_aslb_ir_ds = 575; - protected static final int gen_aslw_ir_ds = 576; + protected static final int gen_aslb_dd_ds = 576; - protected static final int gen_aslw_dd_ds = 577; + protected static final int gen_aslw_ir_ds = 577; - protected static final int gen_asll_ir_ds = 578; + protected static final int gen_aslw_dd_ds = 578; - protected static final int gen_asll_dd_ds = 579; + protected static final int gen_asll_ir_ds = 579; - protected static final int gen_aslw_ea = 580; + protected static final int gen_asll_dd_ds = 580; - protected static final int gen_lsrb_ir_ds = 581; + protected static final int gen_aslw_ea = 581; - protected static final int gen_lsrb_dd_ds = 582; + protected static final int gen_lsrb_ir_ds = 582; - protected static final int gen_lsrw_ir_ds = 583; + protected static final int gen_lsrb_dd_ds = 583; - protected static final int gen_lsrw_dd_ds = 584; + protected static final int gen_lsrw_ir_ds = 584; - protected static final int gen_lsrl_ir_ds = 585; + protected static final int gen_lsrw_dd_ds = 585; - protected static final int gen_lsrl_dd_ds = 586; + protected static final int gen_lsrl_ir_ds = 586; - protected static final int gen_lsrw_ea = 587; + protected static final int gen_lsrl_dd_ds = 587; - protected static final int gen_lslb_ir_ds = 588; + protected static final int gen_lsrw_ea = 588; - protected static final int gen_lslb_dd_ds = 589; + protected static final int gen_lslb_ir_ds = 589; - protected static final int gen_lslw_ir_ds = 590; + protected static final int gen_lslb_dd_ds = 590; - protected static final int gen_lslw_dd_ds = 591; + protected static final int gen_lslw_ir_ds = 591; - protected static final int gen_lsll_ir_ds = 592; + protected static final int gen_lslw_dd_ds = 592; - protected static final int gen_lsll_dd_ds = 593; + protected static final int gen_lsll_ir_ds = 593; - protected static final int gen_lslw_ea = 594; + protected static final int gen_lsll_dd_ds = 594; - protected static final int gen_rorb_ir_ds = 595; + protected static final int gen_lslw_ea = 595; - protected static final int gen_rorb_dd_ds = 596; + protected static final int gen_rorb_ir_ds = 596; - protected static final int gen_rorw_ir_ds = 597; + protected static final int gen_rorb_dd_ds = 597; - protected static final int gen_rorw_dd_ds = 598; + protected static final int gen_rorw_ir_ds = 598; - protected static final int gen_rorl_ir_ds = 599; + protected static final int gen_rorw_dd_ds = 599; - protected static final int gen_rorl_dd_ds = 600; + protected static final int gen_rorl_ir_ds = 600; - protected static final int gen_rorw_ea = 601; + protected static final int gen_rorl_dd_ds = 601; - protected static final int gen_rolb_ir_ds = 602; + protected static final int gen_rorw_ea = 602; - protected static final int gen_rolb_dd_ds = 603; + protected static final int gen_rolb_ir_ds = 603; - protected static final int gen_rolw_ir_ds = 604; + protected static final int gen_rolb_dd_ds = 604; - protected static final int gen_rolw_dd_ds = 605; + protected static final int gen_rolw_ir_ds = 605; - protected static final int gen_roll_ir_ds = 606; + protected static final int gen_rolw_dd_ds = 606; - protected static final int gen_roll_dd_ds = 607; + protected static final int gen_roll_ir_ds = 607; - protected static final int gen_rolw_ea = 608; + protected static final int gen_roll_dd_ds = 608; + + protected static final int gen_rolw_ea = 609; public static final int BKPT_EXIT = 0x00010000; @@ -5824,9 +5826,9 @@ public abstract class Core extends CoreALU { dar[ry] = (dar[ry] & ~0xffff) | (dt & 0xffff); mpc = resume_prefetch; continue; - case 443: /* gen_negl_ea */ - dt = long_neg(dt); - mpc = ea_resume_write32; + case 443: /* gen_negw_ea */ + dt = word_neg(dt); + mpc = ea_resume_write16; continue; case 444: /* gen_negl_ds */ ry = ir & 0x0007; @@ -5834,74 +5836,78 @@ public abstract class Core extends CoreALU { dar[ry] = dt; mpc = resume_prefetch; continue; - case 445: /* gen_notb_ds */ + case 445: /* gen_negl_ea */ + dt = long_neg(dt); + mpc = ea_resume_write32; + continue; + case 446: /* gen_notb_ds */ ry = ir & 0x0007; dt = byte_not(dar[ry]); dar[ry] = (dar[ry] & ~0xff) | (dt & 0xff); mpc = resume_prefetch; continue; - case 446: /* gen_notb_ea */ + case 447: /* gen_notb_ea */ dt = byte_not(dt); mpc = ea_resume_write8; continue; - case 447: /* gen_notw_ds */ + case 448: /* gen_notw_ds */ ry = ir & 0x0007; dt = word_not(dar[ry]); dar[ry] = (dar[ry] & ~0xffff) | (dt & 0xffff); mpc = resume_prefetch; continue; - case 448: /* gen_notw_ea */ + case 449: /* gen_notw_ea */ dt = word_not(dt); mpc = ea_resume_write16; continue; - case 449: /* gen_notl_ds */ + case 450: /* gen_notl_ds */ ry = ir & 0x0007; dt = long_not(dar[ry]); dar[ry] = dt; mpc = resume_prefetch; continue; - case 450: /* gen_notl_ea */ + case 451: /* gen_notl_ea */ dt = long_not(dt); mpc = ea_resume_write32; continue; - case 451: /* gen_nbcdb_ds */ + case 452: /* gen_nbcdb_ds */ ry = ir & 0x0007; dt = byte_nbcd(dar[ry]); dar[ry] = (dar[ry] & ~0xff) | (dt & 0xff); mpc = resume_prefetch; continue; - case 452: /* gen_nbcdb_ea */ + case 453: /* gen_nbcdb_ea */ dt = byte_nbcd(dt); mpc = ea_resume_write8; continue; - case 453: /* gen_tstb_ds */ + case 454: /* gen_tstb_ds */ ry = ir & 0x0007; byte_tst(dar[ry]); mpc = resume_prefetch; continue; - case 454: /* gen_tstb_ea */ + case 455: /* gen_tstb_ea */ byte_tst(dt); mpc = resume_prefetch; continue; - case 455: /* gen_tstw_ds */ + case 456: /* gen_tstw_ds */ ry = ir & 0x0007; word_tst(dar[ry]); mpc = resume_prefetch; continue; - case 456: /* gen_tstw_ea */ + case 457: /* gen_tstw_ea */ word_tst(dt); mpc = resume_prefetch; continue; - case 457: /* gen_tstl_ds */ + case 458: /* gen_tstl_ds */ ry = ir & 0x0007; long_tst(dar[ry]); mpc = resume_prefetch; continue; - case 458: /* gen_tstl_ea */ + case 459: /* gen_tstl_ea */ long_tst(dt); mpc = resume_prefetch; continue; - case 459: /* gen_addb_ir_ds */ + case 460: /* gen_addb_ir_ds */ alub = (ir >> 9) & 0x0007; if (alub == 0) { alub = 8; @@ -5911,7 +5917,7 @@ public abstract class Core extends CoreALU { dar[ry] = (dar[ry] & ~0xff) | (dt & 0xff); mpc = resume_prefetch; continue; - case 460: /* gen_addb_ir_ea */ + case 461: /* gen_addb_ir_ea */ alub = (ir >> 9) & 0x0007; if (alub == 0) { alub = 8; @@ -5919,7 +5925,7 @@ public abstract class Core extends CoreALU { dt = byte_add(alub, dt); mpc = ea_resume_write8; continue; - case 461: /* gen_addw_ir_ds */ + case 462: /* gen_addw_ir_ds */ alub = (ir >> 9) & 0x0007; if (alub == 0) { alub = 8; @@ -5929,7 +5935,7 @@ public abstract class Core extends CoreALU { dar[ry] = (dar[ry] & ~0xffff) | (dt & 0xffff); mpc = resume_prefetch; continue; - case 462: /* gen_addw_ir_as */ + case 463: /* gen_addw_ir_as */ alub = (ir >> 9) & 0x0007; if (alub == 0) { alub = 8; @@ -5939,7 +5945,7 @@ public abstract class Core extends CoreALU { dar[ry] = dar[ry] + ((short) alub); mpc = resume_prefetch; continue; - case 463: /* gen_addw_ir_ea */ + case 464: /* gen_addw_ir_ea */ alub = (ir >> 9) & 0x0007; if (alub == 0) { alub = 8; @@ -5947,7 +5953,7 @@ public abstract class Core extends CoreALU { dt = word_add(alub, dt); mpc = ea_resume_write16; continue; - case 464: /* gen_addl_ir_ds */ + case 465: /* gen_addl_ir_ds */ alub = (ir >> 9) & 0x0007; if (alub == 0) { alub = 8; @@ -5957,7 +5963,7 @@ public abstract class Core extends CoreALU { dar[ry] = dt; mpc = resume_prefetch; continue; - case 465: /* gen_addl_ir_as */ + case 466: /* gen_addl_ir_as */ alub = (ir >> 9) & 0x0007; if (alub == 0) { alub = 8; @@ -5967,7 +5973,7 @@ public abstract class Core extends CoreALU { dar[ry] = dar[ry] + alub; mpc = resume_prefetch; continue; - case 466: /* gen_addl_ir_ea */ + case 467: /* gen_addl_ir_ea */ alub = (ir >> 9) & 0x0007; if (alub == 0) { alub = 8; @@ -5975,7 +5981,7 @@ public abstract class Core extends CoreALU { dt = long_add(alub, dt); mpc = ea_resume_write32; continue; - case 467: /* gen_subb_ir_ds */ + case 468: /* gen_subb_ir_ds */ alub = (ir >> 9) & 0x0007; if (alub == 0) { alub = 8; @@ -5985,7 +5991,7 @@ public abstract class Core extends CoreALU { dar[ry] = (dar[ry] & ~0xff) | (dt & 0xff); mpc = resume_prefetch; continue; - case 468: /* gen_subb_ir_ea */ + case 469: /* gen_subb_ir_ea */ alub = (ir >> 9) & 0x0007; if (alub == 0) { alub = 8; @@ -5993,7 +5999,7 @@ public abstract class Core extends CoreALU { dt = byte_sub(alub, dt); mpc = ea_resume_write8; continue; - case 469: /* gen_subw_ir_ds */ + case 470: /* gen_subw_ir_ds */ alub = (ir >> 9) & 0x0007; if (alub == 0) { alub = 8; @@ -6003,7 +6009,7 @@ public abstract class Core extends CoreALU { dar[ry] = (dar[ry] & ~0xffff) | (dt & 0xffff); mpc = resume_prefetch; continue; - case 470: /* gen_subw_ir_as */ + case 471: /* gen_subw_ir_as */ alub = (ir >> 9) & 0x0007; if (alub == 0) { alub = 8; @@ -6013,7 +6019,7 @@ public abstract class Core extends CoreALU { dar[ry] = dar[ry] - ((short) alub); mpc = resume_prefetch; continue; - case 471: /* gen_subw_ir_ea */ + case 472: /* gen_subw_ir_ea */ alub = (ir >> 9) & 0x0007; if (alub == 0) { alub = 8; @@ -6021,7 +6027,7 @@ public abstract class Core extends CoreALU { dt = word_sub(alub, dt); mpc = ea_resume_write16; continue; - case 472: /* gen_subl_ir_ds */ + case 473: /* gen_subl_ir_ds */ alub = (ir >> 9) & 0x0007; if (alub == 0) { alub = 8; @@ -6031,7 +6037,7 @@ public abstract class Core extends CoreALU { dar[ry] = dt; mpc = resume_prefetch; continue; - case 473: /* gen_subl_ir_as */ + case 474: /* gen_subl_ir_as */ alub = (ir >> 9) & 0x0007; if (alub == 0) { alub = 8; @@ -6041,7 +6047,7 @@ public abstract class Core extends CoreALU { dar[ry] = dar[ry] - alub; mpc = resume_prefetch; continue; - case 474: /* gen_subl_ir_ea */ + case 475: /* gen_subl_ir_ea */ alub = (ir >> 9) & 0x0007; if (alub == 0) { alub = 8; @@ -6049,99 +6055,99 @@ public abstract class Core extends CoreALU { dt = long_sub(alub, dt); mpc = ea_resume_write32; continue; - case 475: /* gen_movel_im_dd */ + case 476: /* gen_movel_im_dd */ dt = (byte) ir; rx = (ir >> 9) & 0x0007; long_tst(dt); dar[rx] = dt; mpc = resume_prefetch; continue; - case 476: /* gen_orb_ds_dd */ + case 477: /* gen_orb_ds_dd */ ry = ir & 0x0007; rx = (ir >> 9) & 0x0007; dt = byte_or(dar[ry], dar[rx]); dar[rx] = (dar[rx] & ~0xff) | (dt & 0xff); mpc = resume_prefetch; continue; - case 477: /* gen_orb_dt_dd */ + case 478: /* gen_orb_dt_dd */ rx = (ir >> 9) & 0x0007; dt = byte_or(dt, dar[rx]); dar[rx] = (dar[rx] & ~0xff) | (dt & 0xff); mpc = resume_prefetch; continue; - case 478: /* gen_orw_ds_dd */ + case 479: /* gen_orw_ds_dd */ ry = ir & 0x0007; rx = (ir >> 9) & 0x0007; dt = word_or(dar[ry], dar[rx]); dar[rx] = (dar[rx] & ~0xffff) | (dt & 0xffff); mpc = resume_prefetch; continue; - case 479: /* gen_orw_dt_dd */ + case 480: /* gen_orw_dt_dd */ rx = (ir >> 9) & 0x0007; dt = word_or(dt, dar[rx]); dar[rx] = (dar[rx] & ~0xffff) | (dt & 0xffff); mpc = resume_prefetch; continue; - case 480: /* gen_orl_ds_dd */ + case 481: /* gen_orl_ds_dd */ ry = ir & 0x0007; rx = (ir >> 9) & 0x0007; dt = long_or(dar[ry], dar[rx]); dar[rx] = dt; mpc = resume_prefetch; continue; - case 481: /* gen_orl_dt_dd */ + case 482: /* gen_orl_dt_dd */ rx = (ir >> 9) & 0x0007; dt = long_or(dt, dar[rx]); dar[rx] = dt; mpc = resume_prefetch; continue; - case 482: /* gen_sbcdb_ds_dd */ + case 483: /* gen_sbcdb_ds_dd */ ry = ir & 0x0007; rx = (ir >> 9) & 0x0007; dt = byte_sbcd(dar[ry], dar[rx]); dar[rx] = (dar[rx] & ~0xff) | (dt & 0xff); mpc = resume_prefetch; continue; - case 483: /* gen_sbcdb_im_ea */ + case 484: /* gen_sbcdb_im_ea */ dt = byte_sbcd(alub, dt); mpc = ea_resume_write8; continue; - case 484: /* gen_orb_dd_ea */ + case 485: /* gen_orb_dd_ea */ rx = (ir >> 9) & 0x0007; dt = byte_or(dar[rx], dt); mpc = ea_resume_write8; continue; - case 485: /* gen_orw_dd_ea */ + case 486: /* gen_orw_dd_ea */ rx = (ir >> 9) & 0x0007; dt = word_or(dar[rx], dt); mpc = ea_resume_write16; continue; - case 486: /* gen_orl_dd_ea */ + case 487: /* gen_orl_dd_ea */ rx = (ir >> 9) & 0x0007; dt = long_or(dar[rx], dt); mpc = ea_resume_write32; continue; - case 487: /* gen_subb_ds_dd */ + case 488: /* gen_subb_ds_dd */ ry = ir & 0x0007; rx = (ir >> 9) & 0x0007; dt = byte_sub(dar[ry], dar[rx]); dar[rx] = (dar[rx] & ~0xff) | (dt & 0xff); mpc = resume_prefetch; continue; - case 488: /* gen_subb_dt_dd */ + case 489: /* gen_subb_dt_dd */ rx = (ir >> 9) & 0x0007; dt = byte_sub(dt, dar[rx]); dar[rx] = (dar[rx] & ~0xff) | (dt & 0xff); mpc = resume_prefetch; continue; - case 489: /* gen_subw_ds_dd */ + case 490: /* gen_subw_ds_dd */ ry = ir & 0x0007; rx = (ir >> 9) & 0x0007; dt = word_sub(dar[ry], dar[rx]); dar[rx] = (dar[rx] & ~0xffff) | (dt & 0xffff); mpc = resume_prefetch; continue; - case 490: /* gen_subw_as_dd */ + case 491: /* gen_subw_as_dd */ ry = ir & 0x0007; ry = ry == 7 ? sp : ry | 8; rx = (ir >> 9) & 0x0007; @@ -6149,20 +6155,20 @@ public abstract class Core extends CoreALU { dar[rx] = (dar[rx] & ~0xffff) | (dt & 0xffff); mpc = resume_prefetch; continue; - case 491: /* gen_subw_dt_dd */ + case 492: /* gen_subw_dt_dd */ rx = (ir >> 9) & 0x0007; dt = word_sub(dt, dar[rx]); dar[rx] = (dar[rx] & ~0xffff) | (dt & 0xffff); mpc = resume_prefetch; continue; - case 492: /* gen_subl_ds_dd */ + case 493: /* gen_subl_ds_dd */ ry = ir & 0x0007; rx = (ir >> 9) & 0x0007; dt = long_sub(dar[ry], dar[rx]); dar[rx] = dt; mpc = resume_prefetch; continue; - case 493: /* gen_subl_as_dd */ + case 494: /* gen_subl_as_dd */ ry = ir & 0x0007; ry = ry == 7 ? sp : ry | 8; rx = (ir >> 9) & 0x0007; @@ -6170,68 +6176,68 @@ public abstract class Core extends CoreALU { dar[rx] = dt; mpc = resume_prefetch; continue; - case 494: /* gen_subl_dt_dd */ + case 495: /* gen_subl_dt_dd */ rx = (ir >> 9) & 0x0007; dt = long_sub(dt, dar[rx]); dar[rx] = dt; mpc = resume_prefetch; continue; - case 495: /* gen_subb_dd_ea */ + case 496: /* gen_subb_dd_ea */ rx = (ir >> 9) & 0x0007; dt = byte_sub(dar[rx], dt); mpc = ea_resume_write8; continue; - case 496: /* gen_subw_dd_ea */ + case 497: /* gen_subw_dd_ea */ rx = (ir >> 9) & 0x0007; dt = word_sub(dar[rx], dt); mpc = ea_resume_write16; continue; - case 497: /* gen_subl_dd_ea */ + case 498: /* gen_subl_dd_ea */ rx = (ir >> 9) & 0x0007; dt = long_sub(dar[rx], dt); mpc = ea_resume_write32; continue; - case 498: /* gen_subxb_ds_dd */ + case 499: /* gen_subxb_ds_dd */ ry = ir & 0x0007; rx = (ir >> 9) & 0x0007; dt = byte_subx(dar[ry], dar[rx]); dar[rx] = (dar[rx] & ~0xff) | (dt & 0xff); mpc = resume_prefetch; continue; - case 499: /* gen_subxb_im_ea */ + case 500: /* gen_subxb_im_ea */ dt = byte_subx(alub, dt); mpc = ea_resume_write8; continue; - case 500: /* gen_subxw_ds_dd */ + case 501: /* gen_subxw_ds_dd */ ry = ir & 0x0007; rx = (ir >> 9) & 0x0007; dt = word_subx(dar[ry], dar[rx]); dar[rx] = (dar[rx] & ~0xffff) | (dt & 0xffff); mpc = resume_prefetch; continue; - case 501: /* gen_subxw_im_ea */ + case 502: /* gen_subxw_im_ea */ dt = word_subx(alub, dt); mpc = ea_resume_write16; continue; - case 502: /* gen_subxl_ds_dd */ + case 503: /* gen_subxl_ds_dd */ ry = ir & 0x0007; rx = (ir >> 9) & 0x0007; dt = long_subx(dar[ry], dar[rx]); dar[rx] = dt; mpc = resume_prefetch; continue; - case 503: /* gen_subxl_im_ea */ + case 504: /* gen_subxl_im_ea */ dt = long_subx(alub, dt); mpc = ea_resume_write32; continue; - case 504: /* gen_subw_ds_ad */ + case 505: /* gen_subw_ds_ad */ ry = ir & 0x0007; rx = (ir >> 9) & 0x0007; rx = rx == 7 ? sp : rx | 8; dar[rx] = dar[rx] - ((short) dar[ry]); mpc = resume_prefetch; continue; - case 505: /* gen_subw_as_ad */ + case 506: /* gen_subw_as_ad */ ry = ir & 0x0007; ry = ry == 7 ? sp : ry | 8; rx = (ir >> 9) & 0x0007; @@ -6239,20 +6245,20 @@ public abstract class Core extends CoreALU { dar[rx] = dar[rx] - ((short) dar[ry]); mpc = resume_prefetch; continue; - case 506: /* gen_subw_dt_ad */ + case 507: /* gen_subw_dt_ad */ rx = (ir >> 9) & 0x0007; rx = rx == 7 ? sp : rx | 8; dar[rx] = dar[rx] - ((short) dt); mpc = resume_prefetch; continue; - case 507: /* gen_subl_ds_ad */ + case 508: /* gen_subl_ds_ad */ ry = ir & 0x0007; rx = (ir >> 9) & 0x0007; rx = rx == 7 ? sp : rx | 8; dar[rx] = dar[rx] - dar[ry]; mpc = resume_prefetch; continue; - case 508: /* gen_subl_as_ad */ + case 509: /* gen_subl_as_ad */ ry = ir & 0x0007; ry = ry == 7 ? sp : ry | 8; rx = (ir >> 9) & 0x0007; @@ -6260,67 +6266,67 @@ public abstract class Core extends CoreALU { dar[rx] = dar[rx] - dar[ry]; mpc = resume_prefetch; continue; - case 509: /* gen_subl_dt_ad */ + case 510: /* gen_subl_dt_ad */ rx = (ir >> 9) & 0x0007; rx = rx == 7 ? sp : rx | 8; dar[rx] = dar[rx] - dt; mpc = resume_prefetch; continue; - case 510: /* gen_cmpb_ds_dd */ + case 511: /* gen_cmpb_ds_dd */ ry = ir & 0x0007; rx = (ir >> 9) & 0x0007; byte_cmp(dar[ry], dar[rx]); mpc = resume_prefetch; continue; - case 511: /* gen_cmpb_dt_dd */ + case 512: /* gen_cmpb_dt_dd */ rx = (ir >> 9) & 0x0007; byte_cmp(dt, dar[rx]); mpc = resume_prefetch; continue; - case 512: /* gen_cmpw_ds_dd */ + case 513: /* gen_cmpw_ds_dd */ ry = ir & 0x0007; rx = (ir >> 9) & 0x0007; word_cmp(dar[ry], dar[rx]); mpc = resume_prefetch; continue; - case 513: /* gen_cmpw_as_dd */ + case 514: /* gen_cmpw_as_dd */ ry = ir & 0x0007; ry = ry == 7 ? sp : ry | 8; rx = (ir >> 9) & 0x0007; word_cmp(dar[ry], dar[rx]); mpc = resume_prefetch; continue; - case 514: /* gen_cmpw_dt_dd */ + case 515: /* gen_cmpw_dt_dd */ rx = (ir >> 9) & 0x0007; word_cmp(dt, dar[rx]); mpc = resume_prefetch; continue; - case 515: /* gen_cmpl_ds_dd */ + case 516: /* gen_cmpl_ds_dd */ ry = ir & 0x0007; rx = (ir >> 9) & 0x0007; long_cmp(dar[ry], dar[rx]); mpc = resume_prefetch; continue; - case 516: /* gen_cmpl_as_dd */ + case 517: /* gen_cmpl_as_dd */ ry = ir & 0x0007; ry = ry == 7 ? sp : ry | 8; rx = (ir >> 9) & 0x0007; long_cmp(dar[ry], dar[rx]); mpc = resume_prefetch; continue; - case 517: /* gen_cmpl_dt_dd */ + case 518: /* gen_cmpl_dt_dd */ rx = (ir >> 9) & 0x0007; long_cmp(dt, dar[rx]); mpc = resume_prefetch; continue; - case 518: /* gen_cmpw_ds_ad */ + case 519: /* gen_cmpw_ds_ad */ ry = ir & 0x0007; rx = (ir >> 9) & 0x0007; rx = rx == 7 ? sp : rx | 8; long_cmp((short) dar[ry], dar[rx]); mpc = resume_prefetch; continue; - case 519: /* gen_cmpw_as_ad */ + case 520: /* gen_cmpw_as_ad */ ry = ir & 0x0007; ry = ry == 7 ? sp : ry | 8; rx = (ir >> 9) & 0x0007; @@ -6328,20 +6334,20 @@ public abstract class Core extends CoreALU { long_cmp((short) dar[ry], dar[rx]); mpc = resume_prefetch; continue; - case 520: /* gen_cmpw_dt_ad */ + case 521: /* gen_cmpw_dt_ad */ rx = (ir >> 9) & 0x0007; rx = rx == 7 ? sp : rx | 8; long_cmp((short) dt, dar[rx]); mpc = resume_prefetch; continue; - case 521: /* gen_cmpl_ds_ad */ + case 522: /* gen_cmpl_ds_ad */ ry = ir & 0x0007; rx = (ir >> 9) & 0x0007; rx = rx == 7 ? sp : rx | 8; long_cmp(dar[ry], dar[rx]); mpc = resume_prefetch; continue; - case 522: /* gen_cmpl_as_ad */ + case 523: /* gen_cmpl_as_ad */ ry = ir & 0x0007; ry = ry == 7 ? sp : ry | 8; rx = (ir >> 9) & 0x0007; @@ -6349,146 +6355,146 @@ public abstract class Core extends CoreALU { long_cmp(dar[ry], dar[rx]); mpc = resume_prefetch; continue; - case 523: /* gen_cmpl_dt_ad */ + case 524: /* gen_cmpl_dt_ad */ rx = (ir >> 9) & 0x0007; rx = rx == 7 ? sp : rx | 8; long_cmp(dt, dar[rx]); mpc = resume_prefetch; continue; - case 524: /* gen_cmpmb_im_ea */ + case 525: /* gen_cmpmb_im_ea */ byte_cmp(alub, dt); mpc = resume_prefetch; continue; - case 525: /* gen_cmpmw_im_ea */ + case 526: /* gen_cmpmw_im_ea */ word_cmp(alub, dt); mpc = resume_prefetch; continue; - case 526: /* gen_cmpml_im_ea */ + case 527: /* gen_cmpml_im_ea */ long_cmp(alub, dt); mpc = resume_prefetch; continue; - case 527: /* gen_eorb_dd_ds */ + case 528: /* gen_eorb_dd_ds */ rx = (ir >> 9) & 0x0007; ry = ir & 0x0007; dt = byte_eor(dar[rx], dar[ry]); dar[ry] = (dar[ry] & ~0xff) | (dt & 0xff); mpc = resume_prefetch; continue; - case 528: /* gen_eorb_dd_ea */ + case 529: /* gen_eorb_dd_ea */ rx = (ir >> 9) & 0x0007; dt = byte_eor(dar[rx], dt); mpc = ea_resume_write8; continue; - case 529: /* gen_eorw_dd_ds */ + case 530: /* gen_eorw_dd_ds */ rx = (ir >> 9) & 0x0007; ry = ir & 0x0007; dt = word_eor(dar[rx], dar[ry]); dar[ry] = (dar[ry] & ~0xffff) | (dt & 0xffff); mpc = resume_prefetch; continue; - case 530: /* gen_eorw_dd_ea */ + case 531: /* gen_eorw_dd_ea */ rx = (ir >> 9) & 0x0007; dt = word_eor(dar[rx], dt); mpc = ea_resume_write16; continue; - case 531: /* gen_eorl_dd_ds */ + case 532: /* gen_eorl_dd_ds */ rx = (ir >> 9) & 0x0007; ry = ir & 0x0007; dt = long_eor(dar[rx], dar[ry]); dar[ry] = dt; mpc = resume_prefetch; continue; - case 532: /* gen_eorl_dd_ea */ + case 533: /* gen_eorl_dd_ea */ rx = (ir >> 9) & 0x0007; dt = long_eor(dar[rx], dt); mpc = ea_resume_write32; continue; - case 533: /* gen_andb_ds_dd */ + case 534: /* gen_andb_ds_dd */ ry = ir & 0x0007; rx = (ir >> 9) & 0x0007; dt = byte_and(dar[ry], dar[rx]); dar[rx] = (dar[rx] & ~0xff) | (dt & 0xff); mpc = resume_prefetch; continue; - case 534: /* gen_andb_dt_dd */ + case 535: /* gen_andb_dt_dd */ rx = (ir >> 9) & 0x0007; dt = byte_and(dt, dar[rx]); dar[rx] = (dar[rx] & ~0xff) | (dt & 0xff); mpc = resume_prefetch; continue; - case 535: /* gen_andw_ds_dd */ + case 536: /* gen_andw_ds_dd */ ry = ir & 0x0007; rx = (ir >> 9) & 0x0007; dt = word_and(dar[ry], dar[rx]); dar[rx] = (dar[rx] & ~0xffff) | (dt & 0xffff); mpc = resume_prefetch; continue; - case 536: /* gen_andw_dt_dd */ + case 537: /* gen_andw_dt_dd */ rx = (ir >> 9) & 0x0007; dt = word_and(dt, dar[rx]); dar[rx] = (dar[rx] & ~0xffff) | (dt & 0xffff); mpc = resume_prefetch; continue; - case 537: /* gen_andl_ds_dd */ + case 538: /* gen_andl_ds_dd */ ry = ir & 0x0007; rx = (ir >> 9) & 0x0007; dt = long_and(dar[ry], dar[rx]); dar[rx] = dt; mpc = resume_prefetch; continue; - case 538: /* gen_andl_dt_dd */ + case 539: /* gen_andl_dt_dd */ rx = (ir >> 9) & 0x0007; dt = long_and(dt, dar[rx]); dar[rx] = dt; mpc = resume_prefetch; continue; - case 539: /* gen_andb_dd_ea */ + case 540: /* gen_andb_dd_ea */ rx = (ir >> 9) & 0x0007; dt = byte_and(dar[rx], dt); mpc = ea_resume_write8; continue; - case 540: /* gen_andw_dd_ea */ + case 541: /* gen_andw_dd_ea */ rx = (ir >> 9) & 0x0007; dt = word_and(dar[rx], dt); mpc = ea_resume_write16; continue; - case 541: /* gen_andl_dd_ea */ + case 542: /* gen_andl_dd_ea */ rx = (ir >> 9) & 0x0007; dt = long_and(dar[rx], dt); mpc = ea_resume_write32; continue; - case 542: /* gen_abcdb_ds_dd */ + case 543: /* gen_abcdb_ds_dd */ ry = ir & 0x0007; rx = (ir >> 9) & 0x0007; dt = byte_abcd(dar[ry], dar[rx]); dar[rx] = (dar[rx] & ~0xff) | (dt & 0xff); mpc = resume_prefetch; continue; - case 543: /* gen_abcdb_im_ea */ + case 544: /* gen_abcdb_im_ea */ dt = byte_abcd(alub, dt); mpc = ea_resume_write8; continue; - case 544: /* gen_addb_ds_dd */ + case 545: /* gen_addb_ds_dd */ ry = ir & 0x0007; rx = (ir >> 9) & 0x0007; dt = byte_add(dar[ry], dar[rx]); dar[rx] = (dar[rx] & ~0xff) | (dt & 0xff); mpc = resume_prefetch; continue; - case 545: /* gen_addb_dt_dd */ + case 546: /* gen_addb_dt_dd */ rx = (ir >> 9) & 0x0007; dt = byte_add(dt, dar[rx]); dar[rx] = (dar[rx] & ~0xff) | (dt & 0xff); mpc = resume_prefetch; continue; - case 546: /* gen_addw_ds_dd */ + case 547: /* gen_addw_ds_dd */ ry = ir & 0x0007; rx = (ir >> 9) & 0x0007; dt = word_add(dar[ry], dar[rx]); dar[rx] = (dar[rx] & ~0xffff) | (dt & 0xffff); mpc = resume_prefetch; continue; - case 547: /* gen_addw_as_dd */ + case 548: /* gen_addw_as_dd */ ry = ir & 0x0007; ry = ry == 7 ? sp : ry | 8; rx = (ir >> 9) & 0x0007; @@ -6496,20 +6502,20 @@ public abstract class Core extends CoreALU { dar[rx] = (dar[rx] & ~0xffff) | (dt & 0xffff); mpc = resume_prefetch; continue; - case 548: /* gen_addw_dt_dd */ + case 549: /* gen_addw_dt_dd */ rx = (ir >> 9) & 0x0007; dt = word_add(dt, dar[rx]); dar[rx] = (dar[rx] & ~0xffff) | (dt & 0xffff); mpc = resume_prefetch; continue; - case 549: /* gen_addl_ds_dd */ + case 550: /* gen_addl_ds_dd */ ry = ir & 0x0007; rx = (ir >> 9) & 0x0007; dt = long_add(dar[ry], dar[rx]); dar[rx] = dt; mpc = resume_prefetch; continue; - case 550: /* gen_addl_as_dd */ + case 551: /* gen_addl_as_dd */ ry = ir & 0x0007; ry = ry == 7 ? sp : ry | 8; rx = (ir >> 9) & 0x0007; @@ -6517,68 +6523,68 @@ public abstract class Core extends CoreALU { dar[rx] = dt; mpc = resume_prefetch; continue; - case 551: /* gen_addl_dt_dd */ + case 552: /* gen_addl_dt_dd */ rx = (ir >> 9) & 0x0007; dt = long_add(dt, dar[rx]); dar[rx] = dt; mpc = resume_prefetch; continue; - case 552: /* gen_addb_dd_ea */ + case 553: /* gen_addb_dd_ea */ rx = (ir >> 9) & 0x0007; dt = byte_add(dar[rx], dt); mpc = ea_resume_write8; continue; - case 553: /* gen_addw_dd_ea */ + case 554: /* gen_addw_dd_ea */ rx = (ir >> 9) & 0x0007; dt = word_add(dar[rx], dt); mpc = ea_resume_write16; continue; - case 554: /* gen_addl_dd_ea */ + case 555: /* gen_addl_dd_ea */ rx = (ir >> 9) & 0x0007; dt = long_add(dar[rx], dt); mpc = ea_resume_write32; continue; - case 555: /* gen_addxb_ds_dd */ + case 556: /* gen_addxb_ds_dd */ ry = ir & 0x0007; rx = (ir >> 9) & 0x0007; dt = byte_addx(dar[ry], dar[rx]); dar[rx] = (dar[rx] & ~0xff) | (dt & 0xff); mpc = resume_prefetch; continue; - case 556: /* gen_addxb_im_ea */ + case 557: /* gen_addxb_im_ea */ dt = byte_addx(alub, dt); mpc = ea_resume_write8; continue; - case 557: /* gen_addxw_ds_dd */ + case 558: /* gen_addxw_ds_dd */ ry = ir & 0x0007; rx = (ir >> 9) & 0x0007; dt = word_addx(dar[ry], dar[rx]); dar[rx] = (dar[rx] & ~0xffff) | (dt & 0xffff); mpc = resume_prefetch; continue; - case 558: /* gen_addxw_im_ea */ + case 559: /* gen_addxw_im_ea */ dt = word_addx(alub, dt); mpc = ea_resume_write16; continue; - case 559: /* gen_addxl_ds_dd */ + case 560: /* gen_addxl_ds_dd */ ry = ir & 0x0007; rx = (ir >> 9) & 0x0007; dt = long_addx(dar[ry], dar[rx]); dar[rx] = dt; mpc = resume_prefetch; continue; - case 560: /* gen_addxl_im_ea */ + case 561: /* gen_addxl_im_ea */ dt = long_addx(alub, dt); mpc = ea_resume_write32; continue; - case 561: /* gen_addw_ds_ad */ + case 562: /* gen_addw_ds_ad */ ry = ir & 0x0007; rx = (ir >> 9) & 0x0007; rx = rx == 7 ? sp : rx | 8; dar[rx] = dar[rx] + ((short) dar[ry]); mpc = resume_prefetch; continue; - case 562: /* gen_addw_as_ad */ + case 563: /* gen_addw_as_ad */ ry = ir & 0x0007; ry = ry == 7 ? sp : ry | 8; rx = (ir >> 9) & 0x0007; @@ -6586,20 +6592,20 @@ public abstract class Core extends CoreALU { dar[rx] = dar[rx] + ((short) dar[ry]); mpc = resume_prefetch; continue; - case 563: /* gen_addw_dt_ad */ + case 564: /* gen_addw_dt_ad */ rx = (ir >> 9) & 0x0007; rx = rx == 7 ? sp : rx | 8; dar[rx] = dar[rx] + ((short) dt); mpc = resume_prefetch; continue; - case 564: /* gen_addl_ds_ad */ + case 565: /* gen_addl_ds_ad */ ry = ir & 0x0007; rx = (ir >> 9) & 0x0007; rx = rx == 7 ? sp : rx | 8; dar[rx] = dar[rx] + dar[ry]; mpc = resume_prefetch; continue; - case 565: /* gen_addl_as_ad */ + case 566: /* gen_addl_as_ad */ ry = ir & 0x0007; ry = ry == 7 ? sp : ry | 8; rx = (ir >> 9) & 0x0007; @@ -6607,13 +6613,13 @@ public abstract class Core extends CoreALU { dar[rx] = dar[rx] + dar[ry]; mpc = resume_prefetch; continue; - case 566: /* gen_addl_dt_ad */ + case 567: /* gen_addl_dt_ad */ rx = (ir >> 9) & 0x0007; rx = rx == 7 ? sp : rx | 8; dar[rx] = dar[rx] + dt; mpc = resume_prefetch; continue; - case 567: /* gen_asrb_ir_ds */ + case 568: /* gen_asrb_ir_ds */ alub = (ir >> 9) & 0x0007; if (alub == 0) { alub = 8; @@ -6623,14 +6629,14 @@ public abstract class Core extends CoreALU { dar[ry] = (dar[ry] & ~0xff) | (dt & 0xff); mpc = resume_prefetch; continue; - case 568: /* gen_asrb_dd_ds */ + case 569: /* gen_asrb_dd_ds */ rx = (ir >> 9) & 0x0007; ry = ir & 0x0007; dt = byte_asr(dar[rx], dar[ry]); dar[ry] = (dar[ry] & ~0xff) | (dt & 0xff); mpc = resume_prefetch; continue; - case 569: /* gen_asrw_ir_ds */ + case 570: /* gen_asrw_ir_ds */ alub = (ir >> 9) & 0x0007; if (alub == 0) { alub = 8; @@ -6640,14 +6646,14 @@ public abstract class Core extends CoreALU { dar[ry] = (dar[ry] & ~0xffff) | (dt & 0xffff); mpc = resume_prefetch; continue; - case 570: /* gen_asrw_dd_ds */ + case 571: /* gen_asrw_dd_ds */ rx = (ir >> 9) & 0x0007; ry = ir & 0x0007; dt = word_asr(dar[rx], dar[ry]); dar[ry] = (dar[ry] & ~0xffff) | (dt & 0xffff); mpc = resume_prefetch; continue; - case 571: /* gen_asrl_ir_ds */ + case 572: /* gen_asrl_ir_ds */ alub = (ir >> 9) & 0x0007; if (alub == 0) { alub = 8; @@ -6657,18 +6663,18 @@ public abstract class Core extends CoreALU { dar[ry] = dt; mpc = resume_prefetch; continue; - case 572: /* gen_asrl_dd_ds */ + case 573: /* gen_asrl_dd_ds */ rx = (ir >> 9) & 0x0007; ry = ir & 0x0007; dt = long_asr(dar[rx], dar[ry]); dar[ry] = dt; mpc = resume_prefetch; continue; - case 573: /* gen_asrw_ea */ + case 574: /* gen_asrw_ea */ dt = word_asr(1, dt); mpc = ea_resume_write16; continue; - case 574: /* gen_aslb_ir_ds */ + case 575: /* gen_aslb_ir_ds */ alub = (ir >> 9) & 0x0007; if (alub == 0) { alub = 8; @@ -6678,14 +6684,14 @@ public abstract class Core extends CoreALU { dar[ry] = (dar[ry] & ~0xff) | (dt & 0xff); mpc = resume_prefetch; continue; - case 575: /* gen_aslb_dd_ds */ + case 576: /* gen_aslb_dd_ds */ rx = (ir >> 9) & 0x0007; ry = ir & 0x0007; dt = byte_asl(dar[rx], dar[ry]); dar[ry] = (dar[ry] & ~0xff) | (dt & 0xff); mpc = resume_prefetch; continue; - case 576: /* gen_aslw_ir_ds */ + case 577: /* gen_aslw_ir_ds */ alub = (ir >> 9) & 0x0007; if (alub == 0) { alub = 8; @@ -6695,14 +6701,14 @@ public abstract class Core extends CoreALU { dar[ry] = (dar[ry] & ~0xffff) | (dt & 0xffff); mpc = resume_prefetch; continue; - case 577: /* gen_aslw_dd_ds */ + case 578: /* gen_aslw_dd_ds */ rx = (ir >> 9) & 0x0007; ry = ir & 0x0007; dt = word_asl(dar[rx], dar[ry]); dar[ry] = (dar[ry] & ~0xffff) | (dt & 0xffff); mpc = resume_prefetch; continue; - case 578: /* gen_asll_ir_ds */ + case 579: /* gen_asll_ir_ds */ alub = (ir >> 9) & 0x0007; if (alub == 0) { alub = 8; @@ -6712,18 +6718,18 @@ public abstract class Core extends CoreALU { dar[ry] = dt; mpc = resume_prefetch; continue; - case 579: /* gen_asll_dd_ds */ + case 580: /* gen_asll_dd_ds */ rx = (ir >> 9) & 0x0007; ry = ir & 0x0007; dt = long_asl(dar[rx], dar[ry]); dar[ry] = dt; mpc = resume_prefetch; continue; - case 580: /* gen_aslw_ea */ + case 581: /* gen_aslw_ea */ dt = word_asl(1, dt); mpc = ea_resume_write16; continue; - case 581: /* gen_lsrb_ir_ds */ + case 582: /* gen_lsrb_ir_ds */ alub = (ir >> 9) & 0x0007; if (alub == 0) { alub = 8; @@ -6733,14 +6739,14 @@ public abstract class Core extends CoreALU { dar[ry] = (dar[ry] & ~0xff) | (dt & 0xff); mpc = resume_prefetch; continue; - case 582: /* gen_lsrb_dd_ds */ + case 583: /* gen_lsrb_dd_ds */ rx = (ir >> 9) & 0x0007; ry = ir & 0x0007; dt = byte_lsr(dar[rx], dar[ry]); dar[ry] = (dar[ry] & ~0xff) | (dt & 0xff); mpc = resume_prefetch; continue; - case 583: /* gen_lsrw_ir_ds */ + case 584: /* gen_lsrw_ir_ds */ alub = (ir >> 9) & 0x0007; if (alub == 0) { alub = 8; @@ -6750,14 +6756,14 @@ public abstract class Core extends CoreALU { dar[ry] = (dar[ry] & ~0xffff) | (dt & 0xffff); mpc = resume_prefetch; continue; - case 584: /* gen_lsrw_dd_ds */ + case 585: /* gen_lsrw_dd_ds */ rx = (ir >> 9) & 0x0007; ry = ir & 0x0007; dt = word_lsr(dar[rx], dar[ry]); dar[ry] = (dar[ry] & ~0xffff) | (dt & 0xffff); mpc = resume_prefetch; continue; - case 585: /* gen_lsrl_ir_ds */ + case 586: /* gen_lsrl_ir_ds */ alub = (ir >> 9) & 0x0007; if (alub == 0) { alub = 8; @@ -6767,18 +6773,18 @@ public abstract class Core extends CoreALU { dar[ry] = dt; mpc = resume_prefetch; continue; - case 586: /* gen_lsrl_dd_ds */ + case 587: /* gen_lsrl_dd_ds */ rx = (ir >> 9) & 0x0007; ry = ir & 0x0007; dt = long_lsr(dar[rx], dar[ry]); dar[ry] = dt; mpc = resume_prefetch; continue; - case 587: /* gen_lsrw_ea */ + case 588: /* gen_lsrw_ea */ dt = word_lsr(1, dt); mpc = ea_resume_write16; continue; - case 588: /* gen_lslb_ir_ds */ + case 589: /* gen_lslb_ir_ds */ alub = (ir >> 9) & 0x0007; if (alub == 0) { alub = 8; @@ -6788,14 +6794,14 @@ public abstract class Core extends CoreALU { dar[ry] = (dar[ry] & ~0xff) | (dt & 0xff); mpc = resume_prefetch; continue; - case 589: /* gen_lslb_dd_ds */ + case 590: /* gen_lslb_dd_ds */ rx = (ir >> 9) & 0x0007; ry = ir & 0x0007; dt = byte_lsl(dar[rx], dar[ry]); dar[ry] = (dar[ry] & ~0xff) | (dt & 0xff); mpc = resume_prefetch; continue; - case 590: /* gen_lslw_ir_ds */ + case 591: /* gen_lslw_ir_ds */ alub = (ir >> 9) & 0x0007; if (alub == 0) { alub = 8; @@ -6805,14 +6811,14 @@ public abstract class Core extends CoreALU { dar[ry] = (dar[ry] & ~0xffff) | (dt & 0xffff); mpc = resume_prefetch; continue; - case 591: /* gen_lslw_dd_ds */ + case 592: /* gen_lslw_dd_ds */ rx = (ir >> 9) & 0x0007; ry = ir & 0x0007; dt = word_lsl(dar[rx], dar[ry]); dar[ry] = (dar[ry] & ~0xffff) | (dt & 0xffff); mpc = resume_prefetch; continue; - case 592: /* gen_lsll_ir_ds */ + case 593: /* gen_lsll_ir_ds */ alub = (ir >> 9) & 0x0007; if (alub == 0) { alub = 8; @@ -6822,18 +6828,18 @@ public abstract class Core extends CoreALU { dar[ry] = dt; mpc = resume_prefetch; continue; - case 593: /* gen_lsll_dd_ds */ + case 594: /* gen_lsll_dd_ds */ rx = (ir >> 9) & 0x0007; ry = ir & 0x0007; dt = long_lsl(dar[rx], dar[ry]); dar[ry] = dt; mpc = resume_prefetch; continue; - case 594: /* gen_lslw_ea */ + case 595: /* gen_lslw_ea */ dt = word_lsl(1, dt); mpc = ea_resume_write16; continue; - case 595: /* gen_rorb_ir_ds */ + case 596: /* gen_rorb_ir_ds */ alub = (ir >> 9) & 0x0007; if (alub == 0) { alub = 8; @@ -6843,14 +6849,14 @@ public abstract class Core extends CoreALU { dar[ry] = (dar[ry] & ~0xff) | (dt & 0xff); mpc = resume_prefetch; continue; - case 596: /* gen_rorb_dd_ds */ + case 597: /* gen_rorb_dd_ds */ rx = (ir >> 9) & 0x0007; ry = ir & 0x0007; dt = byte_ror(dar[rx], dar[ry]); dar[ry] = (dar[ry] & ~0xff) | (dt & 0xff); mpc = resume_prefetch; continue; - case 597: /* gen_rorw_ir_ds */ + case 598: /* gen_rorw_ir_ds */ alub = (ir >> 9) & 0x0007; if (alub == 0) { alub = 8; @@ -6860,14 +6866,14 @@ public abstract class Core extends CoreALU { dar[ry] = (dar[ry] & ~0xffff) | (dt & 0xffff); mpc = resume_prefetch; continue; - case 598: /* gen_rorw_dd_ds */ + case 599: /* gen_rorw_dd_ds */ rx = (ir >> 9) & 0x0007; ry = ir & 0x0007; dt = word_ror(dar[rx], dar[ry]); dar[ry] = (dar[ry] & ~0xffff) | (dt & 0xffff); mpc = resume_prefetch; continue; - case 599: /* gen_rorl_ir_ds */ + case 600: /* gen_rorl_ir_ds */ alub = (ir >> 9) & 0x0007; if (alub == 0) { alub = 8; @@ -6877,18 +6883,18 @@ public abstract class Core extends CoreALU { dar[ry] = dt; mpc = resume_prefetch; continue; - case 600: /* gen_rorl_dd_ds */ + case 601: /* gen_rorl_dd_ds */ rx = (ir >> 9) & 0x0007; ry = ir & 0x0007; dt = long_ror(dar[rx], dar[ry]); dar[ry] = dt; mpc = resume_prefetch; continue; - case 601: /* gen_rorw_ea */ + case 602: /* gen_rorw_ea */ dt = word_ror(1, dt); mpc = ea_resume_write16; continue; - case 602: /* gen_rolb_ir_ds */ + case 603: /* gen_rolb_ir_ds */ alub = (ir >> 9) & 0x0007; if (alub == 0) { alub = 8; @@ -6898,14 +6904,14 @@ public abstract class Core extends CoreALU { dar[ry] = (dar[ry] & ~0xff) | (dt & 0xff); mpc = resume_prefetch; continue; - case 603: /* gen_rolb_dd_ds */ + case 604: /* gen_rolb_dd_ds */ rx = (ir >> 9) & 0x0007; ry = ir & 0x0007; dt = byte_rol(dar[rx], dar[ry]); dar[ry] = (dar[ry] & ~0xff) | (dt & 0xff); mpc = resume_prefetch; continue; - case 604: /* gen_rolw_ir_ds */ + case 605: /* gen_rolw_ir_ds */ alub = (ir >> 9) & 0x0007; if (alub == 0) { alub = 8; @@ -6915,14 +6921,14 @@ public abstract class Core extends CoreALU { dar[ry] = (dar[ry] & ~0xffff) | (dt & 0xffff); mpc = resume_prefetch; continue; - case 605: /* gen_rolw_dd_ds */ + case 606: /* gen_rolw_dd_ds */ rx = (ir >> 9) & 0x0007; ry = ir & 0x0007; dt = word_rol(dar[rx], dar[ry]); dar[ry] = (dar[ry] & ~0xffff) | (dt & 0xffff); mpc = resume_prefetch; continue; - case 606: /* gen_roll_ir_ds */ + case 607: /* gen_roll_ir_ds */ alub = (ir >> 9) & 0x0007; if (alub == 0) { alub = 8; @@ -6932,14 +6938,14 @@ public abstract class Core extends CoreALU { dar[ry] = dt; mpc = resume_prefetch; continue; - case 607: /* gen_roll_dd_ds */ + case 608: /* gen_roll_dd_ds */ rx = (ir >> 9) & 0x0007; ry = ir & 0x0007; dt = long_rol(dar[rx], dar[ry]); dar[ry] = dt; mpc = resume_prefetch; continue; - case 608: /* gen_rolw_ea */ + case 609: /* gen_rolw_ea */ dt = word_rol(1, dt); mpc = ea_resume_write16; continue; diff --git a/miggy-emu/src/main/java/miggy/cpupoet/MacroPLA.java b/miggy-emu/src/main/java/miggy/cpupoet/MacroPLA.java index 9217062..a7da561 100644 --- a/miggy-emu/src/main/java/miggy/cpupoet/MacroPLA.java +++ b/miggy-emu/src/main/java/miggy/cpupoet/MacroPLA.java @@ -258,6 +258,7 @@ import static miggy.cpupoet.Core.gen_negb_ea; import static miggy.cpupoet.Core.gen_negl_ds; import static miggy.cpupoet.Core.gen_negl_ea; import static miggy.cpupoet.Core.gen_negw_ds; +import static miggy.cpupoet.Core.gen_negw_ea; import static miggy.cpupoet.Core.gen_negxb_ds; import static miggy.cpupoet.Core.gen_negxb_ea; import static miggy.cpupoet.Core.gen_negxl_ds; @@ -1651,19 +1652,19 @@ public enum MacroPLA { neg_w_ds(0x4440, 0xfff8, gen_negw_ds, dbrr, dbrr), - neg_w_ais(0x4450, 0xfff8, ea_ais16_read, dbrr, gen_negl_ea), + neg_w_ais(0x4450, 0xfff8, ea_ais16_read, dbrr, gen_negw_ea), - neg_w_aips(0x4458, 0xfff8, ea_aips16_read, dbrr, gen_negl_ea), + neg_w_aips(0x4458, 0xfff8, ea_aips16_read, dbrr, gen_negw_ea), - neg_w_pais(0x4460, 0xfff8, ea_pais16_read, dbrr, gen_negl_ea), + neg_w_pais(0x4460, 0xfff8, ea_pais16_read, dbrr, gen_negw_ea), - neg_w_das(0x4468, 0xfff8, ea_das16_read, dbrr, gen_negl_ea), + neg_w_das(0x4468, 0xfff8, ea_das16_read, dbrr, gen_negw_ea), - neg_w_dais(0x4470, 0xfff8, ea_dais16_read, dbrr, gen_negl_ea), + neg_w_dais(0x4470, 0xfff8, ea_dais16_read, dbrr, gen_negw_ea), - neg_w_adr16(0x4478, 0xffff, ea_adr16s16_read, dbrr, gen_negl_ea), + neg_w_adr16(0x4478, 0xffff, ea_adr16s16_read, dbrr, gen_negw_ea), - neg_w_adr32(0x4479, 0xffff, ea_adr32s16_read, dbrr, gen_negl_ea), + neg_w_adr32(0x4479, 0xffff, ea_adr32s16_read, dbrr, gen_negw_ea), neg_l_ds(0x4480, 0xfff8, gen_negl_ds, dbrr, dbrr), diff --git a/miggy-emu/src/test/java/miggy/cpupoet/InstructionTests.java b/miggy-emu/src/test/java/miggy/cpupoet/InstructionTests.java index 5104cf5..abbb71d 100644 --- a/miggy-emu/src/test/java/miggy/cpupoet/InstructionTests.java +++ b/miggy-emu/src/test/java/miggy/cpupoet/InstructionTests.java @@ -141,7 +141,7 @@ public class InstructionTests extends TestCase { test.executeBinTest("SUBX.w"); test.executeBinTest("SUBX.l"); test.executeBinTest("NEG.b"); - //test.executeBinTest("NEG.w"); + test.executeBinTest("NEG.w"); test.executeBinTest("NEG.l"); test.executeBinTest("NEGX.b"); test.executeBinTest("NEGX.w"); diff --git a/miggy-emu/src/test/resources/miggy/cpupoet/NEG.w.json.bin b/miggy-emu/src/test/resources/miggy/cpupoet/NEG.w.json.bin new file mode 100644 index 0000000..d569776 Binary files /dev/null and b/miggy-emu/src/test/resources/miggy/cpupoet/NEG.w.json.bin differ