diff --git a/miggy-emu/src/main/java/miggy/cpu/genpoet/CoreGenerator.java b/miggy-emu/src/main/java/miggy/cpu/genpoet/CoreGenerator.java index bdbb5c3..8e56293 100644 --- a/miggy-emu/src/main/java/miggy/cpu/genpoet/CoreGenerator.java +++ b/miggy-emu/src/main/java/miggy/cpu/genpoet/CoreGenerator.java @@ -1484,28 +1484,34 @@ public class CoreGenerator { addState("op_clrb_ds"); decode_dy(); addFormattedMicroInsn("dar[ry] &= ~0xff"); + setclr16("sr", FL_Z, FL_N | FL_V | FL_C); microprefetch(true, null); // prefetch ir and resume execution addState("op_clrw_ds"); decode_dy(); addFormattedMicroInsn("dar[ry] &= ~0xffff"); + setclr16("sr", FL_Z, FL_N | FL_V | FL_C); microprefetch(true, null); // prefetch ir and resume execution addState("op_clrl_ds"); decode_dy(); addFormattedMicroInsn("dar[ry] = 0"); + setclr16("sr", FL_Z, FL_N | FL_V | FL_C); microprefetch(true, null); // prefetch ir and resume execution addState("op_clrb_ea"); addFormattedMicroInsn("dt = 0"); + setclr16("sr", FL_Z, FL_N | FL_V | FL_C); microprefetch(true, "8"); // prefetch ir and resume execution addState("op_clrw_ea"); addFormattedMicroInsn("dt = 0"); + setclr16("sr", FL_Z, FL_N | FL_V | FL_C); microprefetch(true, "16"); // prefetch ir and resume execution addState("op_clrl_ea"); addFormattedMicroInsn("dt = 0"); + setclr16("sr", FL_Z, FL_N | FL_V | FL_C); microprefetch(true, "32"); // prefetch ir and resume execution addState("op_lea_ea_ad"); diff --git a/miggy-emu/src/main/java/miggy/cpupoet/Core.java b/miggy-emu/src/main/java/miggy/cpupoet/Core.java index 551a640..08312af 100644 --- a/miggy-emu/src/main/java/miggy/cpupoet/Core.java +++ b/miggy-emu/src/main/java/miggy/cpupoet/Core.java @@ -3876,28 +3876,34 @@ public abstract class Core extends CoreALU { case 237: /* op_clrb_ds */ ry = ir & 0x0007; dar[ry] &= ~0xff; + sr = (sr & ~0x000b) | 0x0004; mpc = resume_prefetch; continue; case 238: /* op_clrw_ds */ ry = ir & 0x0007; dar[ry] &= ~0xffff; + sr = (sr & ~0x000b) | 0x0004; mpc = resume_prefetch; continue; case 239: /* op_clrl_ds */ ry = ir & 0x0007; dar[ry] = 0; + sr = (sr & ~0x000b) | 0x0004; mpc = resume_prefetch; continue; case 240: /* op_clrb_ea */ dt = 0; + sr = (sr & ~0x000b) | 0x0004; mpc = ea_resume_write8; continue; case 241: /* op_clrw_ea */ dt = 0; + sr = (sr & ~0x000b) | 0x0004; mpc = ea_resume_write16; continue; case 242: /* op_clrl_ea */ dt = 0; + sr = (sr & ~0x000b) | 0x0004; mpc = ea_resume_write32; continue; case 243: /* op_lea_ea_ad */ diff --git a/miggy-emu/src/test/java/miggy/cpupoet/InstructionTests.java b/miggy-emu/src/test/java/miggy/cpupoet/InstructionTests.java index 92f282f..5104cf5 100644 --- a/miggy-emu/src/test/java/miggy/cpupoet/InstructionTests.java +++ b/miggy-emu/src/test/java/miggy/cpupoet/InstructionTests.java @@ -110,9 +110,9 @@ public class InstructionTests extends TestCase { test.executeBinTest("TST.b"); test.executeBinTest("TST.w"); test.executeBinTest("TST.l"); -// test.executeBinTest("CLR.b"); -// test.executeBinTest("CLR.w"); -// test.executeBinTest("CLR.l"); + test.executeBinTest("CLR.b"); + test.executeBinTest("CLR.w"); + test.executeBinTest("CLR.l"); test.executeBinTest("TRAP"); test.executeBinTest("TRAPV"); } diff --git a/miggy-emu/src/test/resources/miggy/cpupoet/CLR.b.json.bin b/miggy-emu/src/test/resources/miggy/cpupoet/CLR.b.json.bin new file mode 100644 index 0000000..78914d4 Binary files /dev/null and b/miggy-emu/src/test/resources/miggy/cpupoet/CLR.b.json.bin differ diff --git a/miggy-emu/src/test/resources/miggy/cpupoet/CLR.l.json.bin b/miggy-emu/src/test/resources/miggy/cpupoet/CLR.l.json.bin new file mode 100644 index 0000000..01e8d97 Binary files /dev/null and b/miggy-emu/src/test/resources/miggy/cpupoet/CLR.l.json.bin differ diff --git a/miggy-emu/src/test/resources/miggy/cpupoet/CLR.w.json.bin b/miggy-emu/src/test/resources/miggy/cpupoet/CLR.w.json.bin new file mode 100644 index 0000000..f69b00d Binary files /dev/null and b/miggy-emu/src/test/resources/miggy/cpupoet/CLR.w.json.bin differ