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Added ATA/ATAPI article - dramatic story as always

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Ilia Sharin 2026-06-02 23:48:29 -04:00
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01_hardware/common/bus_architecture.md
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@ -861,6 +861,7 @@ For 68040/060 systems:
| [Gary (OCS)](../ocs_a500/gary_system_controller.md) | Detailed address decode logic and bus timeout |
| [Fat Gary (ECS)](../ecs_a600_a3000/gary_system_controller.md) | 32-bit decode, SCSI, Zorro III glue |
| [cia_chips.md](cia_chips.md) | CIA register semantics, timer programming |
| [ATA/ATAPI Protocol](../../10_devices/atapi.md) | IDE register access at `$DA0000` (Gayle), task file operations, PIO transfer mechanics |
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