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Peripherals and models description improved and expanded
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Ilia Sharin
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@ -21,7 +21,8 @@ The **Enhanced Chip Set** (ECS) is a significant revision of OCS, shipping from
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| [chipset_ecs.md](chipset_ecs.md) | Super Agnus and ECS Denise internals |
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| [ecs_registers_delta.md](ecs_registers_delta.md) | New/changed registers vs OCS |
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| [productivity_modes.md](productivity_modes.md) | Multiscan/productivity display modes |
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| [gary_gayle.md](gary_gayle.md) | Gary (A3000) and Gayle (A600) chips: IDE, PCMCIA |
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| [gary_system_controller.md](gary_system_controller.md) | Gary — A3000 bus controller, DMA arbitration, SCSI glue |
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| [Gayle IDE & PCMCIA](../common/gayle_ide_pcmcia.md) | A600 Gayle: IDE and PCMCIA (shared with A1200) |
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| [chip_ram_expansion.md](chip_ram_expansion.md) | 2 MB Chip RAM with Super Agnus |
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## ECS vs OCS — Key Differences
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@ -1,114 +0,0 @@
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[← Home](../../README.md) · [Hardware](../README.md) · [ECS](README.md)
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# Gary & Gayle — System Controller Chips
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## Gary (A3000)
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**Gary** is the custom system controller chip in the A3000, combining functions that are discrete ICs on the A2000:
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- **Bus controller**: Manages the interaction between 68030/68882, chip bus, and Zorro III
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- **Auto-config controller**: Runs the Zorro expansion enumeration
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- **DMA arbitration**: Between 68030, custom chips, and Zorro III DMA
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- **SCSI interface glue**: Works with the A3000's built-in WD33C93 SCSI controller
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- **ROM decode**: Maps Kickstart ROM into the address space
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Gary is not directly programmable by user software; its configuration is set by hardware strapping and the ROM initialisation sequence.
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## Gayle (A600 / A1200)
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**Gayle** is the custom chip providing **IDE** and **PCMCIA** interface on the A600 and A1200. The A600 and A1200 use different Gayle revisions with different PCMCIA pinouts.
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### Gayle Identification
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```
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A600 Gayle revision ID: read from $DA8000
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A1200 Gayle revision ID: read from $DA8000
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```
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```asm
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move.b $DA8000, d0 ; Read Gayle ID byte
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```
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| Byte | Machine |
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|---|---|
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| $D0 | A600 Gayle |
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| $D1 | A1200 Gayle (revision 1) |
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### Gayle Register Map (A600/A1200)
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| Address | Register | Description |
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|---|---|---|
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| $DA8000 | GAYLE_ID | Chip ID (read shifts bits) |
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| $DA9000 | GAYLE_INT_STATUS | Interrupt status |
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| $DA9004 | GAYLE_INT_ENABLE | Interrupt enable |
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| $DA9008 | GAYLE_CONTROL | Control register |
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### IDE Interface
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The IDE interface via Gayle is at `$DA0000` (A1200) or `$DA0000` (A600):
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| Offset | Register | Description |
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|---|---|---|
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| $DA0000 | DATA | IDE data register (16-bit) |
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| $DA0004 | ERROR/FEATURE | Error (read) / Feature (write) |
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| $DA0008 | SECTOR_COUNT | Sector count |
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| $DA000C | SECTOR_NUMBER | Sector number (LBA 7:0) |
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| $DA0010 | CYLINDER_LOW | Cylinder low (LBA 15:8) |
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| $DA0014 | CYLINDER_HIGH | Cylinder high (LBA 23:16) |
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| $DA0018 | DRIVE_HEAD | Drive/Head/LBA (LBA 27:24) |
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| $DA001C | STATUS/COMMAND | Status (read) / Command (write) |
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| $DA101C | ALT_STATUS | Alternate status (no interrupt clear) |
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| $DA101C | DEVICE_CONTROL | Device control (write) |
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> [!NOTE]
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> On the A1200, IDE registers are byte-wide on odd addresses in a 16-bit window. The data register is 16-bit. This differs from standard PC IDE — byte lanes are swapped relative to x86 convention.
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### PCMCIA Interface (A600/A1200)
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The A600 and A1200 support a Type II PCMCIA (PC Card) slot:
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| Address Range | Type | Description |
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|---|---|---|
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| $600000–$9FFFFF | Attribute memory | Card configuration (CIS access) |
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| $A00000–$A3FFFF | Common memory | Modem/network card data |
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| $A40000–$A7FFFF | Common memory (cont.) | |
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| $600000 (Gayle) | Gayle attribute | Gayle own config space |
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PCMCIA interrupt routing: Card interrupt → Gayle → CIA-A (`/FLG` pin) → CPU IPL 6.
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### Gayle Interrupt Bits
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```c
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/* DA9000 GAYLE_INT_STATUS */
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#define GAYLE_IRQ_IDE (1<<6) /* IDE drive interrupt */
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#define GAYLE_IRQ_CARD (1<<5) /* PCMCIA card interrupt */
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#define GAYLE_IRQ_BVD1 (1<<4) /* PCMCIA battery voltage 1 */
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#define GAYLE_IRQ_BVD2 (1<<3) /* PCMCIA battery voltage 2 */
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#define GAYLE_IRQ_WP (1<<2) /* PCMCIA write protect */
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#define GAYLE_IRQ_CD (1<<1) /* PCMCIA card detect */
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```
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### Gayle Power Control
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Gayle controls PCMCIA card power (5V / 3.3V on A1200 rev 1D+):
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```c
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/* GAYLE_CONTROL bits */
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#define GAYLE_POW (1<<7) /* PCMCIA power on */
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#define GAYLE_WS (1<<6) /* wait states for PCMCIA */
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```
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## AmigaOS IDE Access
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AmigaOS accesses the Gayle IDE through the `scsi.device` or dedicated `ata.device` driver provided with OS 3.1+. Direct IDE programming is done in the filesystem handler (`trackdisk.device` replacement).
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The standard path:
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```
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Application → dos.library → File System Handler → scsi.device → Gayle IDE
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```
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## References
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- Commodore A600 Technical Reference Manual — Gayle chapter
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- Commodore A1200 Technical Reference Manual — Gayle chapter
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- ADCD 2.1 — `Devices_Manual_guide/` scsi.device
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- NDK39: `hardware/gayle.h` (if present), community-documented Gayle registers
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62
01_hardware/ecs_a600_a3000/gary_system_controller.md
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62
01_hardware/ecs_a600_a3000/gary_system_controller.md
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@ -0,0 +1,62 @@
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[← Home](../../README.md) · [Hardware](../README.md) · [ECS](README.md)
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# Gary — A3000 System Controller
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## Overview
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**Gary** is the custom system controller chip in the Amiga 3000. It consolidates functions that are discrete ICs on the A2000 into a single gate array:
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- **Bus controller**: Manages interaction between 68030/68882, chip bus, and Zorro III
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- **Auto-config controller**: Runs Zorro expansion enumeration at boot
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- **DMA arbitration**: Between 68030, custom chips, and Zorro III DMA masters
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- **SCSI interface glue**: Works with the A3000's built-in WD33C93 SCSI controller
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- **ROM decode**: Maps Kickstart ROM into the address space
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Gary is not directly programmable by user software; its configuration is set by hardware strapping and the ROM initialisation sequence.
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## Bus Arbitration
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Gary manages three bus masters:
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| Master | Priority | Description |
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| Custom chips (DMA) | Highest | Agnus DMA for display, audio, disk — must never stall |
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| 68030 CPU | Normal | Program execution |
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| Zorro III cards | Lowest | Expansion bus-mastering DMA |
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When a custom chip DMA cycle occurs, Gary holds the 68030 off the bus until the cycle completes. This is the fundamental source of "DMA contention" slowdown on all Amiga models.
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## A3000 SCSI Integration
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The A3000 includes a built-in **WD33C93A** SCSI controller. Gary provides the glue logic between the SCSI chip and the system bus:
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| Feature | Details |
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| SCSI chip | WD33C93A (SBIC) |
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| DMA | SDMAC — dedicated SCSI DMA controller (separate from the CDTV-style DMAC) |
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| Interface | A3000 uses a dedicated SDMAC chip, not the A2091-style DMAC |
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| AmigaOS driver | `scsi.device` in Kickstart ROM |
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> [!NOTE]
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> The A3000's SDMAC is a different chip from the A2091/CDTV DMAC, despite both interfacing with WD33C93 SCSI controllers. The register layouts are incompatible.
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## Machines Using Gary
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| Model | Gary variant | Notes |
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| A3000 | Original Gary | 68030, Zorro III, WD33C93 SCSI |
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| A3000T | Gary (tower variant) | Same chip; tower form factor with more drive bays |
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The A4000 does **not** use Gary — it uses a different system controller chip called **Ramsey** along with **Budgie** and **Buster** for bus management.
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## References
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- Commodore A3000 Technical Reference Manual
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- ADCD 2.1 — Hardware Manual, A3000 chapter
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- NDK39: hardware headers (community-documented Gary behaviour)
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## See Also
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- [Gayle — IDE & PCMCIA](../common/gayle_ide_pcmcia.md) — A600/A1200 storage controller (different chip, different function)
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- [Zorro Bus](../common/zorro_bus.md) — Zorro II/III expansion managed by Gary
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- [ECS Chipset](chipset_ecs.md) — Super Agnus + ECS Denise (A3000)
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