Peripherals and models description improved and expanded

2026-06-13 00:26:28 +00:00 · 2026-04-25 14:51:45 -04:00 · 2026-04-25 14:51:45 -04:00 · a5b49d073f
commit a5b49d073f
parent 94fb74680f
19 changed files with 1752 additions and 275 deletions
--- a/01_hardware/common/address_space.md
+++ b/01_hardware/common/address_space.md
@ -6,46 +6,102 @@

 The Amiga uses a **24-bit physical address bus** on OCS/ECS machines (68000/68020 effective), giving 16 MB of addressable space. AGA machines with 68030/040 and 32-bit-clean software can address the full 4 GB, but Chip RAM and custom registers remain in the lower 16 MB.

-## Memory Map — 24-bit (OCS/ECS, A500/A600/A3000)
+## Memory Map — 24-bit (OCS/ECS: A1000, A500, A500+, A2000, A600, A3000, CDTV)

-```
-$000000–$1FFFFF  Chip RAM (max 2 MB on ECS, 512 KB on OCS A500)
-$200000–$9FFFFF  Fast RAM (expansion via Zorro II autoconfig)
-$A00000–$BEFFFF  Zorro II I/O space
-$BFD000–$BFDFFF  CIA-B  (8520, keyboard, floppy motor, disk side)
-$BFE001–$BFE1FF  CIA-A  (8520, parallel port, serial flags, timer)
-$C00000–$C7FFFF  Slow RAM ("Ranger", DMA-visible but not fast)
-$C80000–$CFFFFF  Zorro II expansion I/O (boards)
-$D00000–$D7FFFF  Zorro II expansion I/O
-$D80000–$DBFFFF  Reserved / board-specific
-$DC0000–$DCFFFF  Real-Time Clock (MSM6242B / RF5C01A)
-$DD0000–$DEFFFF  Reserved
-$DF0000–$DFFFFF  Custom chip registers ($DFF000–$DFF1FE)
-$E00000–$E7FFFF  Kick memory (WCS / Ranger slow RAM mirror)
-$E80000–$EFFFFF  Autoconfig space (Zorro II probe)
-$F00000–$F7FFFF  Extended Kickstart ROM (OS 3.1: second 256 KB)
-$F80000–$FFFFFF  Kickstart ROM (512 KB mirror at top of 16 MB)
-```
+| Address Range | Size | Region |
+|---|---|---|
+| `$000000`–`$1FFFFF` | 2 MB max | Chip RAM (512 KB on OCS A500, 1–2 MB on ECS) |
+| `$200000`–`$9FFFFF` | 8 MB | Fast RAM (Zorro II autoconfig expansion) |
+| `$A00000`–`$BEFFFF` | ~2 MB | Zorro II I/O space |
+| `$BFD000`–`$BFDFFF` | 4 KB | CIA-B (8520 — keyboard, floppy motor, disk side select) |
+| `$BFE001`–`$BFE1FF` | 512 B | CIA-A (8520 — parallel port, serial flags, timers) |
+| `$C00000`–`$C7FFFF` | 512 KB | Slow RAM ("Ranger" — on Chip bus, not DMA-visible) |
+| `$C80000`–`$CFFFFF` | 512 KB | Zorro II expansion I/O (boards) |
+| `$D00000`–`$D7FFFF` | 512 KB | Zorro II expansion I/O |
+| `$D80000`–`$DBFFFF` | 256 KB | Reserved / board-specific |
+| `$DC0000`–`$DCFFFF` | 64 KB | Real-Time Clock (MSM6242B / RF5C01A) |
+| `$DD0000`–`$DEFFFF` | 128 KB | Reserved |
+| `$DF0000`–`$DFFFFF` | 64 KB | Custom chip registers (`$DFF000`–`$DFF1FE`) |
+| `$E00000`–`$E7FFFF` | 512 KB | Kick memory (WCS / Ranger slow RAM mirror) |
+| `$E80000`–`$EFFFFF` | 512 KB | Autoconfig space (Zorro II probe) |
+| `$F00000`–`$F7FFFF` | 512 KB | Extended Kickstart ROM (OS 3.1: second 256 KB) |
+| `$F80000`–`$FFFFFF` | 512 KB | Kickstart ROM (primary, mirrored at top of 16 MB) |

-## Memory Map — 32-bit (AGA, A1200/A4000)
+## Memory Map — 32-bit (AGA: A1200, A4000, CD32)
+
+| Address Range | Size | Region |
+|---|---|---|
+| `$000000`–`$1FFFFF` | 2 MB | Chip RAM |
+| `$200000`–`$07FFFFFF` | up to 126 MB | Fast RAM (on-board via Ramsey on A4000; trapdoor/PCMCIA on A1200) |
+| `$A00000`–`$BEFFFF` | ~2 MB | Zorro II I/O |
+| `$BFD000` | — | CIA-B |
+| `$BFE001` | — | CIA-A |
+| `$C00000`–`$CFFFFF` | 1 MB | Slow RAM / board I/O |
+| `$D80000`–`$D8FFFF` | 64 KB | IDE / Gayle (A1200/A4000) |
+| `$DA0000`–`$DA3FFF` | 16 KB | PCMCIA attribute memory (A1200) |
+| `$DC0000` | — | Real-Time Clock |
+| `$DFF000`–`$DFFFFF` | 64 KB | Custom chip registers |
+| `$E00000`–`$E7FFFF` | 512 KB | Kick mirror / WCS |
+| `$F00000`–`$F7FFFF` | 512 KB | Extended Kickstart ROM |
+| `$F80000`–`$FFFFFF` | 512 KB | Kickstart ROM |
+| `$01000000`+ | up to 1.75 GB | Zorro III expansion (32-bit, A3000/A4000 only) |
+
+## Per-Model Address Space Variations
+
+The maps above show the common layout. Several models have unique regions:
+
+### A1000 — Writable Control Store (WCS)
+
+| Address Range | Size | Region |
+|---|---|---|
+| `$F80000`–`$FFFFFF` | 512 KB | **WCS RAM** — Kickstart is loaded from floppy into this RAM at boot (A1000 has no ROM-based Kickstart) |
+| `$FC0000`–`$FFFFFF` | 256 KB | Bootstrap ROM (256-byte boot loader that loads Kickstart into WCS) |
+
+The A1000 is the only model where Kickstart lives in **RAM**, not ROM. If power is lost, Kickstart must be reloaded from the Kickstart floppy. The WCS is write-protected after loading via a hardware latch.
+
+### A2000 — Zorro II Bus and CPU Slot
+
+| Address Range | Size | Region |
+|---|---|---|
+| `$200000`–`$9FFFFF` | 8 MB | Zorro II Fast RAM (5 expansion slots, autoconfig) |
+| `$E80000`–`$EFFFFF` | 512 KB | Autoconfig space — probed at boot for each Zorro II card |
+| CPU slot | — | Directly wired 68000 socket — accepts accelerators (GVP G-Force, A2630) |
+
+The A2000 is the canonical "big-box" expandable Amiga. Its 5 Zorro II slots provide 8 MB of Fast RAM address space. Some later A2000 revisions (rev 6+) support Super Agnus for 2 MB Chip RAM.
+
+### CDTV — CD-ROM Controller and NVRAM
+
+| Address Range | Size | Region |
+|---|---|---|
+| `$000000`–`$0FFFFF` | 1 MB | Chip RAM (stock, expandable to 2 MB with Super Agnus mod) |
+| `$E00000`–`$E3FFFF` | 256 KB | CDTV Extended ROM (CD filesystem, player software, DMAC) |
+| `$E40000`–`$E7FFFF` | 256 KB | CDTV Extended ROM (second bank) |
+| `$DC0000`–`$DC003F` | 64 B | Real-Time Clock (Oki MSM6242B) |
+| `$E90000`–`$E9FFFF` | 64 KB | DMAC (WD33C93 SCSI DMA controller for CD-ROM) |
+| `$F00000`–`$F3FFFF` | 256 KB | CDTV **NVRAM** (battery-backed, stores bookmarks and saves) |
+
+The CDTV is essentially an A500 with a CD-ROM drive, IR remote, and NVRAM in a consumer set-top box form factor. It uses the OCS chipset (original Agnus) with 1 MB Chip RAM. The DMAC at `$E90000` handles DMA transfers between the CD-ROM's SCSI interface and memory.
+
+### CD32 — Akiko Chip and Flash ROM
+
+| Address Range | Size | Region |
+|---|---|---|
+| `$000000`–`$1FFFFF` | 2 MB | Chip RAM (fixed) |
+| `$B80000`–`$B8FFFF` | 64 KB | **Akiko** custom chip (chunky-to-planar conversion, CD-ROM controller, NVRAM interface) |
+| `$DC0000`–`$DC003F` | 64 B | Real-Time Clock |
+| `$DFF000`–`$DFFFFF` | 64 KB | Custom chip registers (AGA — Alice/Lisa) |
+| `$E00000`–`$E7FFFF` | 512 KB | CD32 Extended ROM (CD filesystem, boot, CDDA player) |
+| `$F00000`–`$F7FFFF` | 512 KB | CD32 flash ROM (firmware, SysInfo) |
+| `$F80000`–`$FFFFFF` | 512 KB | Kickstart 3.1 ROM |
+
+The CD32's unique feature is the **Akiko** chip at `$B80000`, which provides:
+- **Chunky-to-Planar (C2P) conversion**: a hardware DMA engine that converts linear 8-bit pixel arrays to planar bitplane format — the single most sought-after feature for game ports
+- **CD-ROM controller**: handles the double-speed CD drive directly
+- **NVRAM interface**: 1 KB battery-backed storage for game saves
+
+> [!NOTE]
+> The CD32 has no Zorro slots, no CPU slot, no trapdoor connector, and no PCMCIA port. The only expansion path is the (rare) FMV module slot or the SX-1/SX-32 expansion unit that adds a keyboard port, IDE, and PCMCIA.

-```
-$000000–$1FFFFF  2 MB Chip RAM
-$200000–$07FFFFFF Fast RAM (on-board: 4–16 MB via Ramsey on A4000)
-                   Trapdoor/PCMCIA on A1200
-$A00000–$BEFFFF  Zorro II I/O
-$BFD000          CIA-B
-$BFE001          CIA-A
-$C00000–$CFFFFF  Slow RAM / board I/O
-$D80000–$D8FFFF  IDE / Gayle (A1200/A4000)
-$DA0000–$DA3FFF  PCMCIA attribute memory (A1200)
-$DC0000          RTC
-$DFF000–$DFFFFF  Custom registers
-$E00000–$E7FFFF  Kick mirror / WCS
-$F00000–$F7FFFF  Extended ROM
-$F80000–$FFFFFF  Kickstart ROM (512 KB)
-$01000000+       Zorro III expansion (32-bit, A3000/A4000 only)
-```

 ## Memory Type Classification

@ -77,16 +133,24 @@ Fast RAM is **CPU-only** — generally used for code, non-DMA data structures, a
 ## Diagram

 ```mermaid
-block-beta
-    columns 1
-    block:chip["Chip RAM\n$000000–$1FFFFF\n(DMA accessible)"]
-    block:fast["Fast RAM\n$200000–$9FFFFF\n(CPU only, faster)"]
-    block:zio["Zorro II I/O\n$A00000–$BEFFFF"]
-    block:cia["CIA-A/B\n$BFD000/$BFE001"]
-    block:slow["Slow/Ranger RAM\n$C00000–$C7FFFF"]
-    block:rtc["RTC $DC0000"]
-    block:custom["Custom Registers\n$DFF000–$DFFFFF"]
-    block:rom["Kickstart ROM\n$F80000–$FFFFFF"]
+flowchart TB
+    chip["Chip RAM<br/>$000000–$1FFFFF<br/>(DMA accessible)"]
+    fast["Fast RAM<br/>$200000–$9FFFFF<br/>(CPU only, faster)"]
+    zio["Zorro II I/O<br/>$A00000–$BEFFFF"]
+    cia["CIA-A/B<br/>$BFD000 / $BFE001"]
+    slow["Slow / Ranger RAM<br/>$C00000–$C7FFFF"]
+    custom["Custom Registers<br/>$DFF000–$DFFFFF"]
+    rom["Kickstart ROM<br/>$F80000–$FFFFFF"]
+
+    chip --- fast --- zio --- cia --- slow --- custom --- rom
+
+    style chip fill:#2d6a4f,color:#fff
+    style fast fill:#1b4332,color:#fff
+    style slow fill:#774936,color:#fff
+    style custom fill:#e63946,color:#fff
+    style rom fill:#457b9d,color:#fff
+    style zio fill:#264653,color:#fff
+    style cia fill:#264653,color:#fff
 ```

 ## Key Chip RAM Addresses
--- a/01_hardware/common/cia_chips.md
+++ b/01_hardware/common/cia_chips.md
@ -144,9 +144,75 @@ Direct CIA programming should be done with `ciaa`/`ciab` resource claims via `Op
 /* ciaa.ciapra, ciaa.ciaprb, ciaa.ciaicr, ciaa.ciacra, ... */
 ```

+## Per-Model CIA Wiring Variations
+
+While CIA-A and CIA-B register layouts are identical across all Amigas, the **physical wiring** of their port pins varies by model:
+
+### CIA-A Port A Differences
+
+| Bit | Standard (A500/A2000/A1200/A4000) | A1000 | CDTV | CD32 |
+|---|---|---|---|---|
+| 7 | `/FIR1` — joystick 1 fire | Same | Same | **CD32 pad button** (via shift register) |
+| 6 | `/FIR0` — joystick 0 fire | Same | Same | **CD32 pad button** (via shift register) |
+| 5 | `/RDY` — floppy ready | Same | No internal floppy | No floppy |
+| 4 | `/TK0` — track 0 sensor | Same | No internal floppy | No floppy |
+| 3 | `/WPRO` — write protect | Same | No internal floppy | No floppy |
+| 2 | `/CHNG` — disk change | Same | No internal floppy | No floppy |
+| 1 | `/LED` — power LED | Same | Front panel LED | Front panel LED |
+| 0 | `/OVL` — Chip RAM overlay | Same | Same | Same |
+
+### CIA-A `/FLG` Pin
+
+| Model | `/FLG` Source |
+|---|---|
+| A500/A2000/A3000 | Directly accessible for parallel port `BUSY` or expansion |
+| A600/A1200 | **Gayle interrupt routing** — IDE and PCMCIA interrupts arrive here |
+| CDTV | **IR remote receiver** — IR data packets trigger `/FLG` |
+| CD32 | **Akiko interrupt routing** — CD-ROM and NVRAM events |
+
+### CIA-B Port A (Floppy Drive Selection)
+
+| Bit | Standard | CDTV | CD32 |
+|---|---|---|---|
+| 7 | `/MTR` — motor | N/A (no internal floppy) | N/A |
+| 6–3 | `/SEL3`–`/SEL0` — drive select | External floppy only (`/SEL0`) | N/A |
+| 2 | `/SIDE` — head side | N/A | N/A |
+| 1 | `/DIR` — step direction | N/A | N/A |
+| 0 | `/STEP` — step pulse | N/A | N/A |
+
+> [!NOTE]
+> On CDTV and CD32, the CIA-B floppy control bits are electrically disconnected from any drive hardware. Writing to them has no effect. If an external floppy is connected (CDTV with external drive, or CD32 with SX-1), only `/SEL0` and related signals are active.
+
+### CD32 Gamepad — CIA Shift Register Protocol
+
+The CD32 gamepad uses CIA-A's **Serial Data Register (SDR)** for button reads. The controller contains a shift register that is clocked via the joystick port pin 5:
+
+```asm
+; Read CD32 gamepad buttons
+; Returns 7 button bits in d0
+
+    move.b  #$FF, $BFE301       ; CIA-A DDRA: all outputs (temporarily)
+    bset    #6, $BFE001         ; Pin 5 high (clock start)
+    bclr    #6, $BFE001         ; Pin 5 low → latch button state
+
+    ; Clock in 7 bits via pin toggling
+    moveq   #6, d1
+.read_pad:
+    bset    #6, $BFE001         ; clock pulse high
+    btst    #0, $BFE001         ; read data bit
+    bclr    #6, $BFE001         ; clock pulse low
+    roxl.b  #1, d0              ; shift into result
+    dbf     d1, .read_pad
+```
+
+Standard 2-button Atari joysticks ignore the clock signal and remain fully compatible.
+
+---
+
 ## References

 - MOS Technology 6526/8520 datasheet
 - ADCD 2.1 Hardware Manual — CIA chapter: http://amigadev.elowar.com/read/ADCD_2.1/Hardware_Manual_guide/
 - NDK39: `hardware/cia.h`, `resources/cia.h`
 - Autodocs: `cia` resource — http://amigadev.elowar.com/read/ADCD_2.1/Includes_and_Autodocs_3._guide/node00C7.html
+
--- a/01_hardware/common/gayle_ide_pcmcia.md
+++ b/01_hardware/common/gayle_ide_pcmcia.md
@ -0,0 +1,220 @@
+[← Home](../../README.md) · [Hardware](../README.md) · [Common](../common/)
+
+# Gayle — IDE & PCMCIA Controller
+
+## Overview
+
+**Gayle** is Commodore's custom gate-array chip providing **ATA/IDE** hard drive and **PCMCIA Type II** card slot interfaces. It appears in two models with different silicon revisions:
+
+| Model | Gayle ID | IDE | PCMCIA | Notes |
+|---|---|---|---|---|
+| **A600** | `$D0` | Yes (ECS system) | Yes | First Gayle implementation |
+| **A1200** | `$D1` | Yes (AGA system) | Yes | Different byte-lane mapping |
+
+The **CD32** does *not* have Gayle — its storage is handled by [Akiko](../aga_a1200_a4000/akiko_cd32.md).
+
+The **A4000** uses a different IDE interface (directly on the motherboard, no Gayle chip).
+
+## Gayle Identification
+
+The Gayle ID register shifts one bit per read access:
+
+```asm
+    move.b  $DA8000, d0     ; Read Gayle ID byte
+    ; d0 = $D0 → A600 Gayle
+    ; d0 = $D1 → A1200 Gayle
+```
+
+```c
+#define GAYLE_ID_ADDR  0xDA8000
+
+volatile UBYTE *gayle_id = (UBYTE *)GAYLE_ID_ADDR;
+UBYTE id_byte = *gayle_id;
+/* $D0 = A600, $D1 = A1200 */
+```
+
+On machines without Gayle (A500, A2000, A3000, A4000, CD32), reading `$DA8000` returns bus noise — always check before assuming Gayle is present.
+
+---
+
+## Gayle Register Map
+
+| Address | Register | R/W | Description |
+|---|---|---|---|
+| `$DA8000` | `GAYLE_ID` | R | Chip ID (shifts on each read access) |
+| `$DA9000` | `GAYLE_INT_STATUS` | RW | Interrupt status (IDE + PCMCIA) |
+| `$DA9004` | `GAYLE_INT_ENABLE` | RW | Interrupt enable mask |
+| `$DA9008` | `GAYLE_CONTROL` | RW | Control register (PCMCIA power, wait states) |
+
+---
+
+## IDE Interface
+
+### Register Maps — A600 vs A1200
+
+The IDE registers are at base `$DA0000` on both models. The critical difference is **byte-lane mapping**: the A1200 places 8-bit ATA registers on **odd byte offsets** within each 4-byte window, while the A600 uses even offsets.
+
+#### A600 IDE Registers
+
+| Address | ATA Register | R/W |
+|---|---|---|
+| `$DA0000` | Data (16-bit) | RW |
+| `$DA0004` | Error (R) / Features (W) | RW |
+| `$DA0008` | Sector Count | RW |
+| `$DA000C` | Sector Number (LBA 7:0) | RW |
+| `$DA0010` | Cylinder Low (LBA 15:8) | RW |
+| `$DA0014` | Cylinder High (LBA 23:16) | RW |
+| `$DA0018` | Drive/Head (LBA 27:24) | RW |
+| `$DA001C` | Status (R) / Command (W) | RW |
+| `$DA101C` | Alternate Status / Device Control | RW |
+
+#### A1200 IDE Registers
+
+| Address | ATA Register | R/W |
+|---|---|---|
+| `$DA0000` | Data (16-bit) | RW |
+| `$DA0005` | Error (R) / Features (W) | RW |
+| `$DA0009` | Sector Count | RW |
+| `$DA000D` | Sector Number (LBA 7:0) | RW |
+| `$DA0011` | Cylinder Low (LBA 15:8) | RW |
+| `$DA0015` | Cylinder High (LBA 23:16) | RW |
+| `$DA0019` | Drive/Head (LBA 27:24) | RW |
+| `$DA001D` | Status (R) / Command (W) | RW |
+| `$DA101D` | Alternate Status / Device Control | RW |
+
+> [!IMPORTANT]
+> The A1200 byte-lane offset (+1 from A600) is because Gayle maps 8-bit ATA registers on the **odd byte lane** of the 16-bit Amiga bus. IDE drivers must account for this — a single driver cannot blindly use the same offsets for both machines. Check the Gayle ID first.
+
+### PIO Data Transfer
+
+IDE data transfers use 16-bit word access to the Data register:
+
+```asm
+; Read one sector (512 bytes = 256 words) from IDE
+; a0 = destination buffer
+
+    lea     $DA0000, a1         ; IDE data register
+    move.w  #255, d0            ; 256 words
+.read_loop:
+    move.w  (a1), (a0)+         ; read word from IDE → buffer
+    dbf     d0, .read_loop
+```
+
+---
+
+## PCMCIA Interface
+
+Both A600 and A1200 support a **Type II PCMCIA** (PC Card) slot:
+
+| Address Range | Type | Description |
+|---|---|---|
+| `$600000`–`$9FFFFF` | Attribute memory | Card CIS (Card Information Structure) |
+| `$A00000`–`$A3FFFF` | Common memory | Data / I/O window |
+| `$A40000`–`$A7FFFF` | Common memory (cont.) | Extended data area |
+
+### Card Insertion Sequence
+
+1. Card insertion triggers `GAYLE_IRQ_CD` (card detect interrupt)
+2. Software reads CIS from attribute memory at `$600000` to identify card type
+3. Parse `CONFIG` tuple for card configuration
+4. For **ATA cards** (CompactFlash in PCMCIA adapter): configure as IDE device
+5. For **network/modem cards**: use card-specific I/O mapping
+6. For **SRAM cards**: map as block device (up to 4 MB)
+
+---
+
+## Interrupt Handling
+
+### Interrupt Routing
+
+Gayle routes all its interrupts through **CIA-A** `/FLG` pin → `CIAICRF_FLG` → CPU **IPL 6** (INT6).
+
+### Interrupt Status Bits
+
+```c
+/* $DA9000 GAYLE_INT_STATUS — read to check, write 0 to clear */
+#define GAYLE_IRQ_IDE    (1<<7)  /* IDE drive interrupt (A1200) */
+                                  /* bit 6 on A600 */
+#define GAYLE_IRQ_CARD   (1<<6)  /* PCMCIA card interrupt */
+#define GAYLE_IRQ_BVD1   (1<<5)  /* PCMCIA battery voltage detect 1 */
+#define GAYLE_IRQ_BVD2   (1<<4)  /* PCMCIA battery voltage detect 2 */
+#define GAYLE_IRQ_WP     (1<<3)  /* PCMCIA write protect */
+#define GAYLE_IRQ_CD     (1<<2)  /* PCMCIA card detect */
+```
+
+> [!WARNING]
+> The IDE interrupt bit position differs between A600 and A1200 Gayle revisions. Always check the Gayle ID register before masking interrupt bits.
+
+### Interrupt Service Routine
+
+```asm
+; Gayle ISR (INT6 handler)
+gayle_isr:
+    move.b  $DA9000, d0         ; read GAYLE_INT_STATUS
+    btst    #7, d0              ; IDE interrupt? (A1200)
+    beq.s   .check_pcmcia
+    
+    ; Handle IDE interrupt
+    move.b  $DA001D, d1         ; read ATA status to clear INTRQ
+    bclr    #7, $DA9000         ; clear Gayle IDE IRQ
+    bra.s   .done
+    
+.check_pcmcia:
+    btst    #6, d0              ; PCMCIA interrupt?
+    beq.s   .done
+    ; Handle PCMCIA...
+    bclr    #6, $DA9000         ; clear PCMCIA IRQ
+    
+.done:
+    rte
+```
+
+---
+
+## PCMCIA Power Control
+
+Gayle controls PCMCIA card power (5V standard; 3.3V on A1200 rev 1D+):
+
+```c
+/* $DA9008 GAYLE_CONTROL bits */
+#define GAYLE_POW   (1<<7)  /* PCMCIA power on/off */
+#define GAYLE_WS    (1<<6)  /* Wait states for PCMCIA access */
+```
+
+---
+
+## AmigaOS IDE Access
+
+AmigaOS accesses Gayle IDE through the standard device driver stack:
+
+```
+Application → dos.library → File System Handler → scsi.device / ata.device → Gayle IDE
+```
+
+Applications never access Gayle registers directly:
+
+```c
+/* Standard file access — no direct Gayle interaction */
+BPTR fh = Open("DH0:myfile", MODE_NEWFILE);
+Write(fh, data, length);
+Close(fh);
+```
+
+The A600 uses `scsi.device` from Kickstart ROM. The A1200 uses `ata.device` (also called `ide.device` in some OS versions) which includes A1200-specific byte-lane handling.
+
+---
+
+## References
+
+- Commodore A600 Technical Reference Manual — Gayle chapter
+- Commodore A1200 Technical Reference Manual — Gayle chapter
+- NDK39: community-documented Gayle registers (no official header)
+- ADCD 2.1: `scsi.device` / `ata.device` Autodocs
+- [Big Book of Amiga Hardware](https://bigbookofamigahardware.com/) — Gayle pinout and board photos
+
+## See Also
+
+- [Akiko — CD32 Custom Chip](../aga_a1200_a4000/akiko_cd32.md) — CD32 uses Akiko instead of Gayle
+- [Gary — A3000 System Controller](../ecs_a600_a3000/gary_system_controller.md) — A3000 bus controller (no IDE)
+- [CIA Chips](cia_chips.md) — Gayle routes interrupts through CIA-A
+- [Memory Types](memory_types.md) — IDE storage as expansion path
--- a/01_hardware/common/memory_types.md
+++ b/01_hardware/common/memory_types.md
@ -122,6 +122,8 @@ This is why adding Fast RAM instantly speeds up the system — Workbench, librar
 | **A3000** | 1990 | 68030 @ 25 MHz | 1–2 MB | 2 MB | 4–16 MB Fast (on-board) | 4× Zorro III + CPU slot | 32-bit bus, first Zorro III |
 | **A1200** | 1992 | 68EC020 @ 14 MHz | 2 MB | 2 MB | None stock | Trapdoor 150-pin + PCMCIA | AGA chipset |
 | **A4000** | 1992 | 68030 @ 25 MHz or 68040 @ 25 MHz | 2 MB | 2 MB | 4–16 MB Fast (on-board) | 5× Zorro III + CPU slot | AGA, big-box |
+| **CDTV** | 1991 | 68000 @ 7.09 MHz | 1 MB | 2 MB (Super Agnus mod) | None stock | None (A2000-compatible internal) | OCS, CD-ROM, IR remote, NVRAM |
+| **CD32** | 1993 | 68EC020 @ 14 MHz | 2 MB | 2 MB | None stock | FMV slot only (SX-1/SX-32 add-on) | AGA, Akiko C2P, 2× CD-ROM |

 ### Expansion Capabilities

@ -135,6 +137,8 @@ This is why adding Fast RAM instantly speeds up the system — Workbench, librar
 | **A3000** | Fixed 2 MB | On-board (Ramsey), Zorro III cards | 256 MB (Zorro III) |
 | **A1200** | Fixed 2 MB | Trapdoor accelerator, PCMCIA (4 MB) | 256 MB (accelerator) |
 | **A4000** | Fixed 2 MB | On-board (Ramsey), Zorro III, CPU slot | 256 MB+ (accelerator + Zorro III) |
+| **CDTV** | To 2 MB (Super Agnus mod) | None standard; internal A2000-compatible bus | ~2 MB (rare 3rd-party via internal expansion) |
+| **CD32** | Fixed 2 MB | SX-1/SX-32 add-on provides trapdoor-style slot | 128 MB (SX-32 + accelerator) |

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