mirror of
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Peripherals and models description improved and expanded
This commit is contained in:
Ilia Sharin
parent
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19 changed files with 1752 additions and 275 deletions
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@ -23,8 +23,10 @@ The **Advanced Graphics Architecture** (AGA) is the final custom chipset develop
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| [aga_palette.md](aga_palette.md) | 24-bit colour system, 256 registers |
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| [aga_display_modes.md](aga_display_modes.md) | HAM8, 256-colour, doublescan, VGA |
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| [aga_blitter.md](aga_blitter.md) | 64-bit blitter bus, FMODE |
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| [aga_copper.md](aga_copper.md) | AGA Copper programming guide |
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| [cpu_030_040.md](cpu_030_040.md) | 68030/040 on A3000/A4000: cache, MMU, FPU |
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| [gayle_ide_a1200.md](gayle_ide_a1200.md) | A1200 Gayle: IDE and PCMCIA specifics |
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| [akiko_cd32.md](akiko_cd32.md) | CD32 Akiko chip: C2P conversion, CD-ROM, NVRAM |
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| [Gayle IDE & PCMCIA](../common/gayle_ide_pcmcia.md) | A1200 Gayle: IDE and PCMCIA (shared with A600) |
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## AGA vs ECS — Key Differences
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@ -53,17 +55,53 @@ BOOL is_aga = (GfxBase->ChipRevBits0 & (1 << GFXB_AA_ALICE)) != 0;
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| 4 | `GFXB_AA_ALICE` | AGA Alice present |
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| 5 | `GFXB_AA_LISA` | AGA Lisa present |
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## AGA Machines
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---
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## AGA Machines — Per-Model Details
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| Model | CPU | Notes |
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|---|---|---|
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| A1200 | 68020 14 MHz | Budget AGA; Gayle IDE; PCMCIA; 2 MB Chip |
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| A1200 | 68EC020 14 MHz | Budget AGA; Gayle IDE; PCMCIA; 2 MB Chip |
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| A4000 | 68030/040 25 MHz | High-end; Zorro III; IDE; 2 MB Chip + Fast |
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| A4000T | 68040/060 | Tower variant; SCSI |
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| CD32 | 68020 14 MHz | Game console; CD-ROM; SX-1 expansion |
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| CD32 | 68EC020 14 MHz | Game console; Akiko C2P; CD-ROM; no keyboard |
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### CD32 (1993) — AGA Game Console
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The CD32 uses the **identical AGA chipset** (Alice + Lisa + Paula) as the A1200, but adds the **Akiko** custom chip — a unique ASIC providing:
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- **Chunky-to-Planar (C2P) hardware conversion** — converts 8-bit linear pixel data to planar bitplane format
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- **CD-ROM controller** — drives the internal double-speed CD-ROM via PIO (no SCSI, no IDE)
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- **NVRAM interface** — I²C controller for 128-byte onboard EEPROM
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The CD32 has **no Gayle chip** — Akiko replaces all storage functions. It has no keyboard, no floppy, no Zorro slots, and no PCMCIA. The only expansion path is the rear port (SX-1/SX-32 add-on units) or the FMV module slot.
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See the dedicated article: **[Akiko — CD32 Custom Chip](akiko_cd32.md)**
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### A4000T (1994) — Tower Workstation
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The A4000T is the tower variant of the A4000 desktop, adding:
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| Feature | A4000 Desktop | A4000T Tower |
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|---|---|---|
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| CPU | 68030 @ 25 MHz or 68040 @ 25 MHz | 68040 @ 25 MHz or 68060 @ 50 MHz |
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| SCSI | None | **NCR53C710** (Fast SCSI-2, bus-mastering DMA) |
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| Drive bays | 1× 3.5" IDE | 3× 5.25" + 1× 3.5" |
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| Zorro III | 4 slots | 5 slots |
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| CPU slot | Yes | Yes (enhanced pinout) |
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| Power supply | Internal 150W | Internal 300W |
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| IDE | On-board (Gayle-less) | On-board + SCSI |
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The A4000T's **NCR53C710** SCSI controller is a high-performance bus-mastering DMA controller — significantly faster than the WD33C93 used in the A3000 and CDTV. It supports up to 7 SCSI devices on an internal 50-pin ribbon cable.
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> [!NOTE]
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> The A4000T was the last Amiga produced by Commodore before the company's bankruptcy in April 1994. Very few units were manufactured, making it one of the rarest stock Amiga models.
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---
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## References
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- ADCD 2.1 Hardware Manual — AGA chapters
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- NDK39: `graphics/gfxbase.h`, `hardware/custom.h`
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- Commodore A1200/A4000 Technical Reference Manuals (local archive)
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386
01_hardware/aga_a1200_a4000/akiko_cd32.md
Normal file
386
01_hardware/aga_a1200_a4000/akiko_cd32.md
Normal file
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@ -0,0 +1,386 @@
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[← Home](../../README.md) · [Hardware](../README.md) · [AGA](README.md)
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# Akiko — CD32 Custom Chip
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## Overview
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The **Akiko** chip is a custom ASIC unique to the Amiga CD32 game console (1993). It sits alongside the standard AGA chipset (Alice + Lisa + Paula) and provides three subsystems that exist in no other Amiga model:
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1. **Chunky-to-Planar (C2P) conversion** — hardware-accelerated pixel format conversion
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2. **CD-ROM controller** — drives the internal double-speed CD-ROM
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3. **NVRAM interface** — I²C controller for the onboard serial EEPROM
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Akiko is mapped at base address **`$B80000`** and occupies a 32 KB window (`$B80000`–`$B87FFE`).
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## Chip Identification
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Reading a longword from `$B80000` returns the Akiko ID:
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```asm
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move.l $B80000, d0 ; d0 = $C0CACAFE if Akiko present
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cmp.l #$C0CACAFE, d0
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beq .has_akiko
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```
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> [!NOTE]
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> On non-CD32 machines, reading `$B80000` will return bus noise or trigger a bus error. Always wrap Akiko detection in an exception handler or use `graphics.library` v40+ `WriteChunkyPixels()` which auto-detects Akiko internally.
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## Register Map
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| Offset | Name | R/W | Description |
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|---|---|---|---|
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| `$B80000` | `AKIKO_ID` | R | Chip ID — returns `$C0CACAFE` |
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| `$B80002` | `AKIKO_REV` | R | Silicon revision |
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| `$B80004` | `AKIKO_INTREQ` | R | Interrupt request (CD subcode, C2P done) |
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| `$B80008` | `AKIKO_INTENA` | RW | Interrupt enable mask |
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| `$B80010` | `CDROM_PBXSTAT` | RW | CD-ROM PIO buffer/status |
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| `$B80014` | `CDROM_FLAGS` | RW | CD-ROM control flags |
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| `$B80018` | `CDROM_TXDATA` | W | CD-ROM command transmit |
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| `$B8001C` | `CDROM_RXDATA` | R | CD-ROM response receive |
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| `$B80020` | `CDROM_SUBCDATA` | R | CD subcode (Q-channel) data |
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| `$B80024` | `NVRAM_CTRL` | RW | NVRAM I²C control (SCL/SDA direction) |
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| `$B80028` | `NVRAM_DATA` | RW | NVRAM I²C data (SCL/SDA bit-bang) |
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| `$B80030` | `C2P_INPUT` | W | Chunky-to-Planar input register (longword) |
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| `$B80030` | `C2P_OUTPUT` | R | Chunky-to-Planar output register (longword) |
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> [!IMPORTANT]
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> The register map above is reverse-engineered from WinUAE (`akiko.cpp`) and community hardware testing. Commodore never published an official Akiko datasheet.
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---
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## Chunky-to-Planar (C2P) Conversion
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### The Problem
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The AGA chipset uses **planar** graphics — each bitplane is a separate contiguous block of memory. But most game engines (especially PC ports) render in **chunky** format — one byte per pixel in a linear framebuffer. Converting between these formats is computationally expensive on the 68020.
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### How Akiko C2P Works
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Akiko converts **32 chunky pixels** (8-bit each) into **8 bitplane longwords** in hardware. The CPU must feed data in and read results out — Akiko has **no DMA**; it is a register-based pipeline.
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#### Conversion Protocol
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```
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Input: 8 longwords of chunky data (4 pixels × 8 = 32 pixels)
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Output: 8 longwords of planar data (1 longword per bitplane × 8 planes)
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```
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**Step 1 — Write 8 longwords of chunky pixels:**
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```asm
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; a0 = source chunky buffer (32 pixels = 32 bytes, read as 8 longwords)
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; Each longword contains 4 consecutive 8-bit pixels: [P0|P1|P2|P3]
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lea $B80030, a1 ; C2P input register
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move.l (a0)+, (a1) ; pixels 0–3
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move.l (a0)+, (a1) ; pixels 4–7
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move.l (a0)+, (a1) ; pixels 8–11
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move.l (a0)+, (a1) ; pixels 12–15
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move.l (a0)+, (a1) ; pixels 16–19
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move.l (a0)+, (a1) ; pixels 20–23
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move.l (a0)+, (a1) ; pixels 24–27
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move.l (a0)+, (a1) ; pixels 28–31
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```
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**Step 2 — Read 8 longwords of planar output:**
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```asm
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; a2 = destination planar buffer (8 bitplanes × 4 bytes = 32 bytes)
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lea $B80030, a1 ; C2P output register (same address, read mode)
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move.l (a1), (a2)+ ; bitplane 0 (32 pixels, 1 bit each)
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move.l (a1), (a2)+ ; bitplane 1
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move.l (a1), (a2)+ ; bitplane 2
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move.l (a1), (a2)+ ; bitplane 3
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move.l (a1), (a2)+ ; bitplane 4
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move.l (a1), (a2)+ ; bitplane 5
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move.l (a1), (a2)+ ; bitplane 6
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move.l (a1), (a2)+ ; bitplane 7
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```
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#### Optimised Loop (MOVEM)
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In practice, the entire 32-pixel conversion is done with two MOVEM instructions:
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```asm
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; Convert 32 chunky pixels → 8 planar longwords
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; a0 = chunky source, a2 = planar dest
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; a1 = $B80030 (Akiko C2P register)
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movem.l (a0)+, d0-d7 ; load 32 chunky pixels (8 longwords)
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movem.l d0-d7, (a1) ; write to Akiko C2P input
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movem.l (a1), d0-d7 ; read 8 planar longwords from Akiko
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movem.l d0-d7, (a2) ; store to bitplane memory
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lea 32(a2), a2 ; advance planar pointer
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```
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> [!WARNING]
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> MOVEM to a fixed address writes all registers to the **same** address (FIFO-style), which is exactly what Akiko expects. This only works because `$B80030` is a hardware register, not normal RAM.
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#### Full-Screen Conversion Example
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For a 320×256 screen at 8 bitplanes (256 colours):
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```asm
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; Total pixels = 320 × 256 = 81,920
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; Each pass converts 32 pixels → 81,920 / 32 = 2,560 passes
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lea chunky_buffer, a0
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lea planar_buffer, a2
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lea $B80030, a1
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move.l #2560-1, d7 ; loop counter
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.c2p_loop:
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movem.l (a0)+, d0-d6/a3 ; 8 longwords (use a3 for 8th reg)
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movem.l d0-d6/a3, (a1) ; write to Akiko
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movem.l (a1), d0-d6/a3 ; read planar output
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movem.l d0-d6/a3, (a2)
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lea 32(a2), a2
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dbf d7, .c2p_loop
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```
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### Performance Characteristics
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| Metric | Value |
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|---|---|
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| Pixels per pass | 32 |
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| CPU cycles per pass | ~80–100 (68020 @ 14 MHz) |
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| Throughput | ~1.5 MB/s (register I/O bound) |
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| 320×256×8bpp full screen | ~54 ms (~18 fps standalone) |
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#### When to Use Akiko C2P
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| Scenario | Recommendation |
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|---|---|
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| Stock CD32 (68020, Chip RAM only) | **Use Akiko** — significantly faster than CPU-only C2P |
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| CD32 + SX-32 with 68030 + Fast RAM | Benchmark both — software C2P may match Akiko |
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| CD32 + 68040/060 accelerator | **Use software C2P** — CPU is 5–10× faster than Akiko's throughput |
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### AmigaOS Interface
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OS-compliant applications use `WriteChunkyPixels()` from `graphics.library` v40+:
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```c
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#include <graphics/gfx.h>
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/* graphics.library auto-detects Akiko and uses it if present */
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WriteChunkyPixels(
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rp, /* RastPort */
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xstart, ystart, /* top-left corner */
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xstop, ystop, /* bottom-right corner */
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chunky_array, /* source chunky pixel data */
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bytes_per_row /* chunky buffer pitch */
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);
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```
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---
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## CD-ROM Controller
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### Hardware
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The CD32 contains a **Philips/Sony double-speed (2×) CD-ROM** drive. Unlike the CDTV (which uses a SCSI-based controller via DMAC/WD33C93), the CD32's CD-ROM is controlled **directly by Akiko** through a proprietary PIO interface.
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### Drive Capabilities
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| Feature | Specification |
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|---|---|
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| Speed | 2× (300 KB/s data, 150 KB/s audio) |
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| Media | CD-ROM (Mode 1/2), CD-DA, Mixed Mode |
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| Seek | ~400 ms average |
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| Interface | Akiko PIO (no SCSI, no IDE) |
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### CD-ROM Register Protocol
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Communication with the drive is command/response based through the Akiko registers:
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1. **Write command bytes** to `CDROM_TXDATA` (`$B80018`)
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2. **Poll status** via `CDROM_PBXSTAT` (`$B80010`) for response availability
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3. **Read response bytes** from `CDROM_RXDATA` (`$B8001C`)
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4. **Read subcode** from `CDROM_SUBCDATA` (`$B80020`) for TOC/position data
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### Boot from CD
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The CD32 boots exclusively from CD-ROM (no floppy drive). The boot sequence:
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1. Kickstart 3.1 initialises from ROM (`$F80000`)
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2. Extended ROM at `$E00000` provides `cd.device` and the CD filesystem
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3. Akiko initialises the CD-ROM drive
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4. The system reads the TOC and looks for a boot block (Amiga executable format)
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5. If found, the boot executable is loaded and run — this is the game/application entry point
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> [!NOTE]
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> CD32 game discs use standard ISO 9660 with Amiga-specific boot blocks. Many titles also include CD-DA audio tracks for music, played via Akiko's CDDA passthrough.
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---
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## NVRAM (Non-Volatile Storage)
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### Hardware
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The CD32 includes a **1 Kbit (128 bytes) serial EEPROM** (typically a 93C46 or compatible) accessed via I²C bit-banging through Akiko registers.
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| Parameter | Value |
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|---|---|
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| Type | Serial EEPROM (I²C / Microwire) |
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| Capacity | 1 Kbit (128 bytes usable) |
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| Interface | Akiko bit-bang (SCL/SDA via `$B80024`/`$B80028`) |
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| Persistence | Battery-backed (CR2032) |
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| Typical use | Game saves, system preferences, high scores |
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### Access Protocol
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NVRAM access requires bit-banging the I²C clock (SCL) and data (SDA) lines through Akiko registers:
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```asm
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; Simplified NVRAM byte read
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; d0 = address (0–127)
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; Set SDA as output, clock high
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move.l #$01, $B80024 ; NVRAM_CTRL: configure direction
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; Send device address + read command via bit-bang
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; (full protocol requires start condition, address bits, ack)
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; Clock in 8 data bits
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moveq #7, d1
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.read_bit:
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bset #0, $B80028 ; SCL high
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move.l $B80028, d2 ; read SDA
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bclr #0, $B80028 ; SCL low
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roxl.b #1, d0 ; shift bit into result
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dbf d1, .read_bit
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||||
```
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### AmigaOS NVRAM Access
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The OS provides `nonvolatile.library` for structured NVRAM access:
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```c
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#include <libraries/nonvolatile.h>
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/* Store data */
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StoreNV("MyGame", "SaveSlot1", save_data, data_length, TRUE);
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|
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/* Retrieve data */
|
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APTR data = GetNV("MyGame", "SaveSlot1", TRUE);
|
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```
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||||
|
||||
---
|
||||
|
||||
## CD32 Expansion Options
|
||||
|
||||
The CD32 has **no standard expansion slots** (no Zorro, no CPU slot, no trapdoor, no PCMCIA). Third-party units connect via the rear expansion port:
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||||
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||||
### SX-1 (Paravision)
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|
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| Feature | Specification |
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|---|---|
|
||||
| Memory | 1× 72-pin SIMM (1–8 MB Fast RAM) |
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||||
| Storage | Internal 44-pin IDE (2.5" HDD) + external DB37 IDE |
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||||
| I/O | Parallel (DB25), Serial (9-pin RS232), RGB video (DB23) |
|
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| Keyboard | AT-101 connector |
|
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| Floppy | External DB23 floppy connector |
|
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| Other | RTC (CR2032), FMV pass-through, disable switch |
|
||||
|
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### SX-32 / SX-32 Pro (DCE)
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||||
|
||||
| Feature | Specification |
|
||||
|---|---|
|
||||
| Memory | 1× 72-pin SIMM (up to 8 MB) |
|
||||
| Storage | Internal 44-pin IDE |
|
||||
| I/O | Parallel (DB25), Serial (DB25), RGB (DB23), VGA (HD15) |
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| CPU upgrade | SX-32 Pro includes 68030 socket |
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| Other | RTC, external floppy |
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||||
|
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### FMV Module (Commodore)
|
||||
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||||
| Feature | Specification |
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||||
|---|---|
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| Function | MPEG-1 video + audio decoder (Video CD playback) |
|
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| Video chip | C-Cube CL450 MPEG decoder |
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| Audio chip | LSI Logic audio decoder |
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| Limitation | Caps system Fast RAM at 4 MB |
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| Compatibility | Works with SX-1 (pass-through); **incompatible** with SX-32 |
|
||||
|
||||
> [!WARNING]
|
||||
> The FMV module had four hardware revisions. Early revisions (rev 1–2) are prone to overheating. If sourcing one today, look for rev 3 or later.
|
||||
|
||||
---
|
||||
|
||||
## CD32 vs A1200 — Hardware Comparison
|
||||
|
||||
The CD32 is often described as "an A1200 in a console shell." The chipset is identical, but the system-level hardware differs significantly:
|
||||
|
||||
| Feature | A1200 | CD32 |
|
||||
|---|---|---|
|
||||
| CPU | 68EC020 @ 14 MHz | 68EC020 @ 14 MHz |
|
||||
| Custom chips | Alice + Lisa + Paula | Alice + Lisa + Paula + **Akiko** |
|
||||
| Chip RAM | 2 MB | 2 MB |
|
||||
| Chipset | AGA | AGA |
|
||||
| Storage | IDE (Gayle), Floppy | **CD-ROM (Akiko)**, no floppy |
|
||||
| Expansion | Trapdoor (150-pin), PCMCIA | Rear port only (SX-1/SX-32) |
|
||||
| Keyboard | Built-in | None (requires SX-1/SX-32) |
|
||||
| Controller | Atari-style DB9 joystick | **CD32 gamepad** (7-button protocol) |
|
||||
| NVRAM | None | **128 bytes EEPROM** (Akiko) |
|
||||
| Gayle | Yes (IDE, PCMCIA) | **No** — Akiko replaces storage functions |
|
||||
| C2P hardware | No | **Yes** (Akiko) |
|
||||
| Boot media | Floppy / HDD | CD-ROM only |
|
||||
|
||||
### CD32 Gamepad Protocol
|
||||
|
||||
The CD32 gamepad uses a serial shift-register protocol through the standard DB9 controller port, providing 7 buttons:
|
||||
|
||||
| Button | Bit | Accent |
|
||||
|---|---|---|
|
||||
| Blue (Play) | 0 | Fire 1 / primary action |
|
||||
| Red (Rewind) | 1 | Fire 2 / secondary |
|
||||
| Yellow (FF) | 2 | Fire 3 |
|
||||
| Green (Stop) | 3 | Fire 4 |
|
||||
| Right shoulder | 4 | Shoulder R |
|
||||
| Left shoulder | 5 | Shoulder L |
|
||||
| Pause | 6 | Start/Pause |
|
||||
|
||||
Detection: the CD32 pad responds to a clock signal on pin 5 of the joystick port. Standard Atari-style joysticks ignore this signal and remain compatible.
|
||||
|
||||
---
|
||||
|
||||
## Detecting CD32 at Runtime
|
||||
|
||||
```c
|
||||
#include <exec/execbase.h>
|
||||
|
||||
/* Method 1: Check Akiko ID register (hardware-level) */
|
||||
BOOL has_akiko(void)
|
||||
{
|
||||
volatile ULONG *akiko_id = (ULONG *)0xB80000;
|
||||
/* Wrap in exception handler — bus error on non-CD32 */
|
||||
return (*akiko_id == 0xC0CACAFE);
|
||||
}
|
||||
|
||||
/* Method 2: Check for CD32 via expansion.library (safer) */
|
||||
#include <libraries/configvars.h>
|
||||
#include <clib/expansion_protos.h>
|
||||
|
||||
BOOL is_cd32(void)
|
||||
{
|
||||
/* Akiko autoconfig: manufacturer 0x0202, product 0x3E */
|
||||
struct ConfigDev *cd = FindConfigDev(NULL, 0x0202, 0x3E);
|
||||
return (cd != NULL);
|
||||
}
|
||||
```
|
||||
|
||||
## References
|
||||
|
||||
- WinUAE source: `akiko.cpp` — reverse-engineered register definitions (Toni Wilen)
|
||||
- Commodore CD32 Technical Reference (internal, partial — never publicly released)
|
||||
- NDK39: `graphics/gfx.h` — `WriteChunkyPixels()` prototype
|
||||
- NDK39: `libraries/nonvolatile.h` — NVRAM access API
|
||||
- [Big Book of Amiga Hardware — CD32](https://bigbookofamigahardware.com/)
|
||||
- English Amiga Board (EAB) — CD32 hardware discussions
|
||||
|
||||
## See Also
|
||||
|
||||
- [AGA Chipset Internals](chipset_aga.md) — Alice and Lisa (shared with CD32)
|
||||
- [Memory Types](../common/memory_types.md) — CD32 memory configuration
|
||||
- [Address Space](../common/address_space.md) — CD32 address map with Akiko region
|
||||
|
|
@ -118,3 +118,9 @@ move.w #$9411, BPLCON0+custom ; HIRES=1 (if needed), BPU=8 (BPU3=1, BPU2-0=000
|
|||
- NDK39: `hardware/custom.h` — struct Custom (with AGA extensions)
|
||||
- Commodore A1200 Technical Reference Manual — Alice/Lisa section
|
||||
- AmigaMail Vol. 2 — AGA programming articles
|
||||
|
||||
## See Also
|
||||
|
||||
- [Akiko — CD32 Custom Chip](akiko_cd32.md) — CD32-exclusive ASIC (C2P, CD-ROM, NVRAM) that sits alongside Alice/Lisa/Paula
|
||||
- [AGA Blitter](aga_blitter.md) — 64-bit FMODE blitter details
|
||||
- [AGA Palette](aga_palette.md) — 256-register 24-bit colour system
|
||||
|
|
|
|||
|
|
@ -1,97 +0,0 @@
|
|||
[← Home](../../README.md) · [Hardware](../README.md) · [AGA](README.md)
|
||||
|
||||
# Gayle — A1200 IDE & PCMCIA
|
||||
|
||||
## Overview
|
||||
|
||||
The A1200 uses a different revision of **Gayle** than the A600. The A1200 Gayle integrates:
|
||||
- **ATA/IDE interface** (for one hard drive + optional CD-ROM)
|
||||
- **PCMCIA Type II** slot (for modems, network cards, RAM cards)
|
||||
- **Interrupt routing** for both IDE and PCMCIA events
|
||||
|
||||
The A1200 Gayle is at a different base address layout than the A600 Gayle, and the byte-lane mapping differs from the A4000 IDE interface.
|
||||
|
||||
## Gayle ID
|
||||
|
||||
Read the Gayle ID by toggling read access to the ID register:
|
||||
```c
|
||||
#define GAYLE_ID_A1200 0xDA8000 /* read 8 bits, shifts on each access */
|
||||
|
||||
volatile UBYTE *gayle_id = (UBYTE *)0xDA8000;
|
||||
UBYTE id_byte = *gayle_id; /* returns $D0 (A600) or $D1 (A1200) */
|
||||
```
|
||||
|
||||
## IDE Register Map (A1200)
|
||||
|
||||
The A1200 IDE registers are at `$DA0000`, but the byte lanes are **swapped** relative to standard AT/ATA convention — the 8-bit registers appear at odd byte offsets within each 4-byte window:
|
||||
|
||||
| A1200 Address | ATA Register | RW |
|
||||
|---|---|---|
|
||||
| $DA0000 | Data (16-bit) | RW |
|
||||
| $DA0005 | Error (R) / Features (W) | RW |
|
||||
| $DA0009 | Sector Count | RW |
|
||||
| $DA000D | Sector Number (LBA 7:0) | RW |
|
||||
| $DA0011 | Cylinder Low (LBA 15:8) | RW |
|
||||
| $DA0015 | Cylinder High (LBA 23:16) | RW |
|
||||
| $DA0019 | Drive/Head select (LBA 27:24) | RW |
|
||||
| $DA001D | Status (R) / Command (W) | RW |
|
||||
| $DA101D | Alternate Status (R) / Device Control (W) | RW |
|
||||
|
||||
> [!NOTE]
|
||||
> The odd byte offset is because Gayle maps ATA registers on the **odd byte lane** of the 16-bit Amiga bus. Accessing `$DA0000+1` is the first register, not `$DA0000`. Many IDE drivers compensate with an offset of +1 or use a byte-swapped struct.
|
||||
|
||||
## Gayle Interrupt Register
|
||||
|
||||
```
|
||||
$DA9000 GAYLE_INT_STATUS (read/write)
|
||||
$DA9004 GAYLE_INT_ENABLE
|
||||
```
|
||||
|
||||
```c
|
||||
#define GAYLE_IRQ_IDE (1<<7) /* IDE interrupt pending */
|
||||
#define GAYLE_IRQ_CARD (1<<6) /* PCMCIA interrupt */
|
||||
#define GAYLE_IRQ_BVD1 (1<<5)
|
||||
#define GAYLE_IRQ_BVD2 (1<<4)
|
||||
#define GAYLE_IRQ_WP (1<<3) /* PCMCIA write protect */
|
||||
#define GAYLE_IRQ_CD (1<<2) /* PCMCIA card detect */
|
||||
```
|
||||
|
||||
Gayle routes its interrupt to **CIA-A /FLG** pin → CIAA ICR `CIAICRF_FLG` → CPU IPL 6.
|
||||
|
||||
Interrupt service routine must:
|
||||
1. Check `GAYLE_INT_STATUS` to identify source (IDE or PCMCIA)
|
||||
2. Clear the relevant bit by writing 0 to it
|
||||
3. If IDE: read the ATA status register to clear the IDE INTRQ
|
||||
|
||||
## PCMCIA Interface (A1200)
|
||||
|
||||
The A1200 PCMCIA slot is at:
|
||||
|
||||
| Address | Content |
|
||||
|---|---|
|
||||
| $600000–$9FFFFF | PCMCIA attribute memory (card CIS) |
|
||||
| $A00000–$A3FFFF | PCMCIA common memory (data) |
|
||||
|
||||
**Card detect sequence:**
|
||||
1. A card insertion triggers `GAYLE_IRQ_CD` (bit 2)
|
||||
2. Software reads CIS from attribute memory at $600000 to identify card type
|
||||
3. For ATA cards: configure card mode via PCMCIA CIS `CONFIG` tuple
|
||||
4. For network/modem cards: use the card's documented I/O mapping
|
||||
|
||||
## AmigaOS IDE Access
|
||||
|
||||
AmigaOS 3.1 includes `ata.device` (sometimes called `ide.device`) which drives the A1200 Gayle IDE internally. Applications never access Gayle registers directly — they go through dos.library → filesystem handler → ata.device.
|
||||
|
||||
```c
|
||||
/* Standard path — no direct Gayle access needed: */
|
||||
BPTR fh = Open("DH0:myfile", MODE_NEWFILE);
|
||||
Write(fh, data, length);
|
||||
Close(fh);
|
||||
```
|
||||
|
||||
## References
|
||||
|
||||
- Commodore A1200 Technical Reference Manual — Gayle chapter (local archive)
|
||||
- NDK39: (no official Gayle header — community documented)
|
||||
- Amiga Hardware Reference (community supplement) — Gayle register map
|
||||
- `scsi.device` / `ata.device` Autodocs on ADCD 2.1
|
||||
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Reference in a new issue