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Ilia Sharin 2026-04-26 14:46:18 -04:00
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@ -11,7 +11,7 @@ The **Original Chip Set** (OCS) ships in the Amiga 1000 (1985), A500 (1987), and
| Chip | MOS Part | Primary Responsibilities |
|---|---|---|
| **Agnus** | 8361 (PAL), 8367 (NTSC) | DMA controller, Copper coprocessor, Blitter, address generation |
| **Denise** | 8362 | Display: bitplane fetch decode, sprite decode, colour output |
| **Denise** | 8362 | Display: bitplane fetch decode, sprite decode, color output |
| **Paula** | 8364 | Audio DMA (4 channels), floppy disk I/O, serial port, interrupts |
## Contents
@ -90,7 +90,7 @@ The CDTV is an A500-class OCS computer in a consumer set-top box form factor. Se
- Max **512 KB Chip RAM** on A500 rev 5 and earlier (Agnus 8361/8367 addresses 512 KB only)
- A500 rev 6+ allows 1 MB with Fat Agnus (part of later OCS run)
- No productivity display modes (ECS adds BEAMCON0)
- 32 colours max (or 64 EHB, or HAM 12-bit) in standard bitplane modes
- 32 colors max (or 64 EHB, or HAM 12-bit) in standard bitplane modes
- Blitter is 16-bit; no 64-bit fetch (AGA adds FMODE)
- No ECS Denise border features

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@ -128,8 +128,8 @@ The Extended ROM is **not present** on standard A500/A2000 machines. Software th
### Boot Sequence
1. Kickstart 1.3 loads from ROM (`$F80000`)
2. Extended ROM at `$E00000` is detected and initialised
3. `scsi.device` from Extended ROM initialises DMAC + WD33C93
2. Extended ROM at `$E00000` is detected and initialized
3. `scsi.device` from Extended ROM initializes DMAC + WD33C93
4. CD-ROM drive is probed for a bootable disc
5. If a valid Amiga boot block is found on the CD → boot from CD
6. If no CD → fall through to standard floppy boot (if external floppy present)

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@ -20,7 +20,7 @@ block-beta
## DMA Channels and Priorities
Agnus schedules DMA cycles across a fixed priority scheme within each horizontal raster line (228 colour clocks per line, PAL):
Agnus schedules DMA cycles across a fixed priority scheme within each horizontal raster line (228 color clocks per line, PAL):
| Priority | DMA Channel | Register Bits |
|---|---|---|

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@ -6,7 +6,7 @@
The **Copper** (co-processor) is built into Agnus. It executes a simple instruction list (the **copperlist**) in sync with the video beam, allowing precise per-scanline changes to any writable custom register — without CPU intervention.
The Copper can only write to custom registers (it cannot access Chip RAM directly), but it can change bitplane pointers, colours, BPLCON0, sprite pointers, and any other `$DFF0xx` register on a cycle-accurate basis.
The Copper can only write to custom registers (it cannot access Chip RAM directly), but it can change bitplane pointers, colors, BPLCON0, sprite pointers, and any other `$DFF0xx` register on a cycle-accurate basis.
## Copper Instruction Set
@ -59,7 +59,7 @@ A copperlist is an array of 32-bit instruction pairs in **Chip RAM**, terminated
DC.W $FFFF, $FFFE
```
Example — colour cycle on vertical blank:
Example — color cycle on vertical blank:
```asm
Copperlist:
DC.W $0180, $0000 ; COLOR00 = black
@ -110,7 +110,7 @@ Common copper techniques:
**BPLCON0 mid-screen:** Switch between `HIRES` and `LORES`, or between 6-plane and 4-plane modes, on different lines.
**Raster bars:** Write a different colour to COLOR00 on every scanline using sequential WAIT+MOVE pairs.
**Raster bars:** Write a different color to COLOR00 on every scanline using sequential WAIT+MOVE pairs.
## Graphics Library vs Direct Copper

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@ -103,7 +103,7 @@ bit 15: HIRES (1 = 640 pixel wide)
bit 14-12: BPU2-0 (number of bitplanes: 06)
bit 11: HAM (1 = Hold-And-Modify mode)
bit 10: DPF (dual playfield)
bit 9: COLOR (0 = monochrome, 1 = colour)
bit 9: COLOR (0 = monochrome, 1 = color)
bit 8: GAUD (genlock audio)
bit 7-4: (various, OCS = 0)
bit 1: ERSY (external sync)
@ -165,16 +165,16 @@ bit 0: ECSENA (ECS enable — must be 0 on OCS)
| $09E | ADKCON | W | Audio / disk control (write) |
| $07C | DSKSYNC | W | Disk sync word |
## Colour Registers
## Color Registers
| Offset | Name | Dir | Description |
|---|---|---|---|
| $180 | COLOR00 | W | Background / colour 0 |
| $182 | COLOR01 | W | Colour 1 |
| $180 | COLOR00 | W | Background / color 0 |
| $182 | COLOR01 | W | Color 1 |
| ... | | | |
| $1BE | COLOR31 | W | Colour 31 |
| $1BE | COLOR31 | W | Color 31 |
OCS colours: 12-bit RGB (4 bits per component, $0RGB format).
OCS colors: 12-bit RGB (4 bits per component, $0RGB format).
## References

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@ -13,9 +13,9 @@ The OCS/ECS chipset provides **8 hardware sprites**, each 16 pixels wide and arb
| Count | 8 sprites |
| Width | 16 pixels fixed |
| Height | Programmable (any number of lines) |
| Colours | 3 (+1 transparent) per sprite |
| Colour source | Sprite colour registers (COLOR16COLOR31) |
| Attach mode | Pairs 0/1, 2/3, 4/5, 6/7 → 15 colours |
| Colors | 3 (+1 transparent) per sprite |
| Color source | Sprite color registers (COLOR16COLOR31) |
| Attach mode | Pairs 0/1, 2/3, 4/5, 6/7 → 15 colors |
## Sprite Registers
@ -60,14 +60,14 @@ Each line of the sprite consists of two 16-bit words (DATA and DATB) fetched fro
```
For each scanline of sprite:
Word 1 (DATA): bit 15..0 → pixel bit 1 (colour bit 1)
Word 2 (DATB): bit 15..0 → pixel bit 0 (colour bit 0)
Word 1 (DATA): bit 15..0 → pixel bit 1 (color bit 1)
Word 2 (DATB): bit 15..0 → pixel bit 0 (color bit 0)
Pixel colour:
Pixel color:
DATA[bit] = 0, DATB[bit] = 0 → transparent
DATA[bit] = 0, DATB[bit] = 1 → colour 1 (COLOR17 for sprite 0)
DATA[bit] = 1, DATB[bit] = 0 → colour 2 (COLOR18)
DATA[bit] = 1, DATB[bit] = 1 → colour 3 (COLOR19)
DATA[bit] = 0, DATB[bit] = 1 → color 1 (COLOR17 for sprite 0)
DATA[bit] = 1, DATB[bit] = 0 → color 2 (COLOR18)
DATA[bit] = 1, DATB[bit] = 1 → color 3 (COLOR19)
```
## Sprite Data in Memory
@ -85,29 +85,29 @@ Agnus DMA reads the sprite from a memory block structured as:
Word: $0000 (SPRnCTL = 0)
```
## Colour Mapping
## Color Mapping
Sprites share colour registers with bitplanes:
Sprites share color registers with bitplanes:
| Sprites | Colour Registers |
| Sprites | Color Registers |
|---|---|
| 0 and 1 | COLOR16COLOR19 |
| 2 and 3 | COLOR20COLOR23 |
| 4 and 5 | COLOR24COLOR27 |
| 6 and 7 | COLOR28COLOR31 |
COLOR16 (the first colour of sprite pair 0/1) is always transparent — the sprite background. Only COLOR17COLOR19 are visible for sprites 0/1.
COLOR16 (the first color of sprite pair 0/1) is always transparent — the sprite background. Only COLOR17COLOR19 are visible for sprites 0/1.
## Attached Sprites (15 Colours)
## Attached Sprites (15 Colors)
Pairing two sprites (`ATT` bit in SPRnCTL of the even sprite) combines their DATA/DATB bits to produce a 4-bit colour index (16 colours, one transparent):
Pairing two sprites (`ATT` bit in SPRnCTL of the even sprite) combines their DATA/DATB bits to produce a 4-bit color index (16 colors, one transparent):
```
4-bit colour = {SPR_even.DATA[bit], SPR_even.DATB[bit],
4-bit color = {SPR_even.DATA[bit], SPR_even.DATB[bit],
SPR_odd.DATA[bit], SPR_odd.DATB[bit]}
```
This gives 15 visible colours per pair, using COLOR16COLOR31 for pair 0/1.
This gives 15 visible colors per pair, using COLOR16COLOR31 for pair 0/1.
## BPLCON2 — Sprite Priority
@ -122,7 +122,7 @@ Default: sprites appear in front of all bitplanes.
## OS Mouse Pointer
AmigaOS's Intuition uses sprite 0 (and 1 in attached mode for colour pointer) for the mouse pointer. Intuition calls `SetPointer()` / `ClearPointer()` on a Window to install custom pointer sprites.
AmigaOS's Intuition uses sprite 0 (and 1 in attached mode for color pointer) for the mouse pointer. Intuition calls `SetPointer()` / `ClearPointer()` on a Window to install custom pointer sprites.
```c
SetPointer(window, pointer_data, height, width, x_offset, y_offset);