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@ -11,7 +11,7 @@ The **Original Chip Set** (OCS) ships in the Amiga 1000 (1985), A500 (1987), and
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| Chip | MOS Part | Primary Responsibilities |
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|---|---|---|
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| **Agnus** | 8361 (PAL), 8367 (NTSC) | DMA controller, Copper coprocessor, Blitter, address generation |
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| **Denise** | 8362 | Display: bitplane fetch decode, sprite decode, colour output |
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| **Denise** | 8362 | Display: bitplane fetch decode, sprite decode, color output |
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| **Paula** | 8364 | Audio DMA (4 channels), floppy disk I/O, serial port, interrupts |
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## Contents
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@ -90,7 +90,7 @@ The CDTV is an A500-class OCS computer in a consumer set-top box form factor. Se
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- Max **512 KB Chip RAM** on A500 rev 5 and earlier (Agnus 8361/8367 addresses 512 KB only)
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- A500 rev 6+ allows 1 MB with Fat Agnus (part of later OCS run)
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- No productivity display modes (ECS adds BEAMCON0)
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- 32 colours max (or 64 EHB, or HAM 12-bit) in standard bitplane modes
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- 32 colors max (or 64 EHB, or HAM 12-bit) in standard bitplane modes
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- Blitter is 16-bit; no 64-bit fetch (AGA adds FMODE)
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- No ECS Denise border features
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@ -128,8 +128,8 @@ The Extended ROM is **not present** on standard A500/A2000 machines. Software th
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### Boot Sequence
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1. Kickstart 1.3 loads from ROM (`$F80000`)
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2. Extended ROM at `$E00000` is detected and initialised
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3. `scsi.device` from Extended ROM initialises DMAC + WD33C93
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2. Extended ROM at `$E00000` is detected and initialized
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3. `scsi.device` from Extended ROM initializes DMAC + WD33C93
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4. CD-ROM drive is probed for a bootable disc
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5. If a valid Amiga boot block is found on the CD → boot from CD
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6. If no CD → fall through to standard floppy boot (if external floppy present)
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@ -20,7 +20,7 @@ block-beta
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## DMA Channels and Priorities
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Agnus schedules DMA cycles across a fixed priority scheme within each horizontal raster line (228 colour clocks per line, PAL):
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Agnus schedules DMA cycles across a fixed priority scheme within each horizontal raster line (228 color clocks per line, PAL):
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| Priority | DMA Channel | Register Bits |
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|---|---|---|
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@ -6,7 +6,7 @@
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The **Copper** (co-processor) is built into Agnus. It executes a simple instruction list (the **copperlist**) in sync with the video beam, allowing precise per-scanline changes to any writable custom register — without CPU intervention.
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The Copper can only write to custom registers (it cannot access Chip RAM directly), but it can change bitplane pointers, colours, BPLCON0, sprite pointers, and any other `$DFF0xx` register on a cycle-accurate basis.
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The Copper can only write to custom registers (it cannot access Chip RAM directly), but it can change bitplane pointers, colors, BPLCON0, sprite pointers, and any other `$DFF0xx` register on a cycle-accurate basis.
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## Copper Instruction Set
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@ -59,7 +59,7 @@ A copperlist is an array of 32-bit instruction pairs in **Chip RAM**, terminated
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DC.W $FFFF, $FFFE
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```
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Example — colour cycle on vertical blank:
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Example — color cycle on vertical blank:
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```asm
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Copperlist:
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DC.W $0180, $0000 ; COLOR00 = black
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@ -110,7 +110,7 @@ Common copper techniques:
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**BPLCON0 mid-screen:** Switch between `HIRES` and `LORES`, or between 6-plane and 4-plane modes, on different lines.
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**Raster bars:** Write a different colour to COLOR00 on every scanline using sequential WAIT+MOVE pairs.
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**Raster bars:** Write a different color to COLOR00 on every scanline using sequential WAIT+MOVE pairs.
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## Graphics Library vs Direct Copper
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@ -103,7 +103,7 @@ bit 15: HIRES (1 = 640 pixel wide)
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bit 14-12: BPU2-0 (number of bitplanes: 0–6)
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bit 11: HAM (1 = Hold-And-Modify mode)
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bit 10: DPF (dual playfield)
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bit 9: COLOR (0 = monochrome, 1 = colour)
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bit 9: COLOR (0 = monochrome, 1 = color)
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bit 8: GAUD (genlock audio)
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bit 7-4: (various, OCS = 0)
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bit 1: ERSY (external sync)
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@ -165,16 +165,16 @@ bit 0: ECSENA (ECS enable — must be 0 on OCS)
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| $09E | ADKCON | W | Audio / disk control (write) |
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| $07C | DSKSYNC | W | Disk sync word |
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## Colour Registers
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## Color Registers
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| Offset | Name | Dir | Description |
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|---|---|---|---|
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| $180 | COLOR00 | W | Background / colour 0 |
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| $182 | COLOR01 | W | Colour 1 |
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| $180 | COLOR00 | W | Background / color 0 |
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| $182 | COLOR01 | W | Color 1 |
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| ... | | | |
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| $1BE | COLOR31 | W | Colour 31 |
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| $1BE | COLOR31 | W | Color 31 |
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OCS colours: 12-bit RGB (4 bits per component, $0RGB format).
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OCS colors: 12-bit RGB (4 bits per component, $0RGB format).
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## References
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@ -13,9 +13,9 @@ The OCS/ECS chipset provides **8 hardware sprites**, each 16 pixels wide and arb
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| Count | 8 sprites |
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| Width | 16 pixels fixed |
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| Height | Programmable (any number of lines) |
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| Colours | 3 (+1 transparent) per sprite |
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| Colour source | Sprite colour registers (COLOR16–COLOR31) |
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| Attach mode | Pairs 0/1, 2/3, 4/5, 6/7 → 15 colours |
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| Colors | 3 (+1 transparent) per sprite |
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| Color source | Sprite color registers (COLOR16–COLOR31) |
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| Attach mode | Pairs 0/1, 2/3, 4/5, 6/7 → 15 colors |
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## Sprite Registers
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@ -60,14 +60,14 @@ Each line of the sprite consists of two 16-bit words (DATA and DATB) fetched fro
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```
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For each scanline of sprite:
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Word 1 (DATA): bit 15..0 → pixel bit 1 (colour bit 1)
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Word 2 (DATB): bit 15..0 → pixel bit 0 (colour bit 0)
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Word 1 (DATA): bit 15..0 → pixel bit 1 (color bit 1)
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Word 2 (DATB): bit 15..0 → pixel bit 0 (color bit 0)
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Pixel colour:
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Pixel color:
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DATA[bit] = 0, DATB[bit] = 0 → transparent
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DATA[bit] = 0, DATB[bit] = 1 → colour 1 (COLOR17 for sprite 0)
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DATA[bit] = 1, DATB[bit] = 0 → colour 2 (COLOR18)
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DATA[bit] = 1, DATB[bit] = 1 → colour 3 (COLOR19)
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DATA[bit] = 0, DATB[bit] = 1 → color 1 (COLOR17 for sprite 0)
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DATA[bit] = 1, DATB[bit] = 0 → color 2 (COLOR18)
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DATA[bit] = 1, DATB[bit] = 1 → color 3 (COLOR19)
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```
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## Sprite Data in Memory
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@ -85,29 +85,29 @@ Agnus DMA reads the sprite from a memory block structured as:
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Word: $0000 (SPRnCTL = 0)
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```
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## Colour Mapping
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## Color Mapping
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Sprites share colour registers with bitplanes:
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Sprites share color registers with bitplanes:
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| Sprites | Colour Registers |
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| Sprites | Color Registers |
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|---|---|
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| 0 and 1 | COLOR16–COLOR19 |
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| 2 and 3 | COLOR20–COLOR23 |
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| 4 and 5 | COLOR24–COLOR27 |
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| 6 and 7 | COLOR28–COLOR31 |
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COLOR16 (the first colour of sprite pair 0/1) is always transparent — the sprite background. Only COLOR17–COLOR19 are visible for sprites 0/1.
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COLOR16 (the first color of sprite pair 0/1) is always transparent — the sprite background. Only COLOR17–COLOR19 are visible for sprites 0/1.
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## Attached Sprites (15 Colours)
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## Attached Sprites (15 Colors)
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Pairing two sprites (`ATT` bit in SPRnCTL of the even sprite) combines their DATA/DATB bits to produce a 4-bit colour index (16 colours, one transparent):
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Pairing two sprites (`ATT` bit in SPRnCTL of the even sprite) combines their DATA/DATB bits to produce a 4-bit color index (16 colors, one transparent):
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```
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4-bit colour = {SPR_even.DATA[bit], SPR_even.DATB[bit],
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4-bit color = {SPR_even.DATA[bit], SPR_even.DATB[bit],
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SPR_odd.DATA[bit], SPR_odd.DATB[bit]}
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```
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This gives 15 visible colours per pair, using COLOR16–COLOR31 for pair 0/1.
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This gives 15 visible colors per pair, using COLOR16–COLOR31 for pair 0/1.
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## BPLCON2 — Sprite Priority
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@ -122,7 +122,7 @@ Default: sprites appear in front of all bitplanes.
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## OS Mouse Pointer
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AmigaOS's Intuition uses sprite 0 (and 1 in attached mode for colour pointer) for the mouse pointer. Intuition calls `SetPointer()` / `ClearPointer()` on a Window to install custom pointer sprites.
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AmigaOS's Intuition uses sprite 0 (and 1 in attached mode for color pointer) for the mouse pointer. Intuition calls `SetPointer()` / `ClearPointer()` on a Window to install custom pointer sprites.
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```c
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SetPointer(window, pointer_data, height, width, x_offset, y_offset);
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