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Ilia Sharin
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@ -4,13 +4,13 @@
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## What Is the Copper?
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The **Copper** (Co-Processor) is one of the most distinctive pieces of hardware in any computer ever built. It is a tiny, ultra-simple programmable DMA engine that executes a program — called a **copper list** — in perfect synchronisation with the video beam as it sweeps across the screen.
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The **Copper** (Co-Processor) is one of the most distinctive pieces of hardware in any computer ever built. It is a tiny, ultra-simple programmable DMA engine that executes a program — called a **copper list** — in perfect synchronization with the video beam as it sweeps across the screen.
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The Copper watches the beam position and can **write any value to any custom chip register at any specific screen position**. This single capability enables an astonishing range of visual effects.
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### Why Does It Matter?
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On a conventional computer, changing display parameters (colours, scroll positions, resolutions) requires the CPU to execute code at precisely the right moment. This is fragile, wastes CPU time, and is limited by interrupt latency.
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On a conventional computer, changing display parameters (colors, scroll positions, resolutions) requires the CPU to execute code at precisely the right moment. This is fragile, wastes CPU time, and is limited by interrupt latency.
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The Copper does this **automatically, for free, with perfect timing** — every single frame, without any CPU involvement at all.
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@ -50,20 +50,20 @@ The Copper does this **automatically, for free, with perfect timing** — every
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│ │ │ │ │
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│ ┌─────┴──────────────────┴────────────────────────┴─────────┐ │
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│ │ BEAM COUNTER (V count, H count) │ │
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│ │ Increments every colour clock, resets each frame │ │
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│ │ Increments every color clock, resets each frame │ │
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│ │ PAL: 312 lines × 227 clocks NTSC: 262 × 227 │ │
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│ └───────────────────────────────────────────────────────────┘ │
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└──────────┬─────────────────────────────────────────────────────────┘
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└──────────┬──────────────────────────────────────────────────────────┘
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│ register writes ($DFF000–$DFF1FE)
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▼
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┌─────────────────────────────────────────────────────────────────────┐
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│ DENISE / LISA (Video Encoder) │
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│ │
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│ Receives bitplane data + sprite data + colour register values │
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│ Receives bitplane data + sprite data + color register values │
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│ Composites them into a final pixel stream: │
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│ │
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│ ┌────────────┐ ┌──────────┐ ┌──────────┐ ┌──────────────────┐ │
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│ │ Bitplane │ │ Sprite │ │ Colour │ │ Playfield │ │
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│ │ Bitplane │ │ Sprite │ │ Color │ │ Playfield │ │
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│ │ Decode │→ │ Priority │→ │ Palette │→ │ Priority & │ │
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│ │ (planar→ │ │ Merge │ │ Lookup │ │ Genlock Control │ │
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│ │ index) │ │ │ │ (32/256) │ │ │ │
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@ -90,10 +90,10 @@ The Copper does this **automatically, for free, with perfect timing** — every
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### Component Interactions
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**Copper ↔ Chip RAM:**
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The Copper fetches its program (the copper list) from Chip RAM via DMA. It reads one instruction (2 words = 4 bytes) every 4 colour clocks. The copper list **must** reside in Chip RAM — it cannot be in Fast RAM because only Chip RAM is DMA-accessible.
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The Copper fetches its program (the copper list) from Chip RAM via DMA. It reads one instruction (2 words = 4 bytes) every 4 color clocks. The copper list **must** reside in Chip RAM — it cannot be in Fast RAM because only Chip RAM is DMA-accessible.
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**Copper ↔ Custom Registers:**
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When the Copper executes a MOVE instruction, it writes directly to a custom chip register (`$DFF000`–`$DFF1FE`). This is the exact same register space the CPU writes to. The Copper can set colours, bitplane pointers, sprite pointers, display window, scroll offsets, DMA control, and audio parameters.
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When the Copper executes a MOVE instruction, it writes directly to a custom chip register (`$DFF000`–`$DFF1FE`). This is the exact same register space the CPU writes to. The Copper can set colors, bitplane pointers, sprite pointers, display window, scroll offsets, DMA control, and audio parameters.
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**Copper ↔ Beam Counter:**
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The Copper continuously compares the current beam position (V count, H count) against WAIT instructions. When the beam reaches or passes the specified position, execution continues. This is a hardware comparator — no polling loop, no interrupt latency.
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| Effect | How | Used In |
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|---|---|---|
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| **Per-line colour changes** | WAIT for line, MOVE colour register | Gradient skies, rainbow bars |
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| **Per-line color changes** | WAIT for line, MOVE color register | Gradient skies, rainbow bars |
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| **Split screens** | Change bitplane pointers mid-frame | Status bar + scrolling playfield |
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| **Parallax scrolling** | Change BPLCON1 (scroll offset) at different lines | Multi-layer side-scrollers |
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| **Resolution changes** | Change BPLCON0 mid-frame | HiRes menu + LoRes game area |
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| **Sprite multiplexing** | Repoint sprite DMA pointers after sprite finishes | More than 8 sprites per frame |
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| **Palette animation** | Modify colour registers each frame | Cycling colours, water shimmer |
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| **Palette animation** | Modify color registers each frame | Cycling colors, water shimmer |
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| **Display window tricks** | Change DIWSTRT/DIWSTOP | Overscan, letterbox |
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| **Interlace tricks** | Toggle LOF bit | Custom interlace effects |
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| No memory read | Can only WRITE to registers, never read |
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| Write-only to custom regs | Cannot write to CPU memory, CIA, or Fast RAM |
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| Limited register set | Protected registers ($000–$03E) need `COPCON` unlock |
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| No sub-pixel timing | Horizontal resolution is 4 colour clocks (~8 low-res pixels) |
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| No sub-pixel timing | Horizontal resolution is 4 color clocks (~8 low-res pixels) |
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| Vertical wrapping | V counter wraps at 255; PAL lines 256+ need two WAITs |
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---
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@ -191,7 +191,7 @@ Example: Skip next if beam is past line 200:
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## Your First Copper List
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Here's the simplest possible copper list — it changes the background colour at line 128:
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Here's the simplest possible copper list — it changes the background color at line 128:
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```asm
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SECTION copperlist,DATA_C ; *** MUST be in Chip RAM! ***
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@ -220,7 +220,7 @@ To activate it:
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---
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## Rainbow Gradient (Colour Per Scanline)
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## Rainbow Gradient (Color Per Scanline)
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```asm
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RainbowCopper:
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@ -242,7 +242,7 @@ RainbowCopper:
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dc.w $FFFF,$FFFE
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```
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This produces a smooth colour gradient down the screen — **zero CPU cost**.
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This produces a smooth color gradient down the screen — **zero CPU cost**.
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---
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@ -325,23 +325,23 @@ AGA (Alice chip) keeps the same 3-instruction Copper but gains access to the **e
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| AGA Feature | Copper Can Set |
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|---|---|
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| 256-colour palette | `COLOR00–COLOR255` via BPLCON3 bank select |
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| Extended sprites | 64-colour sprites via palette banks |
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| 256-color palette | `COLOR00–COLOR255` via BPLCON3 bank select |
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| Extended sprites | 64-color sprites via palette banks |
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| FMODE | DMA fetch width (but careful — affects in-progress DMA) |
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| BPLCON3/BPLCON4 | AGA-specific bitplane/sprite control |
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### AGA Palette via Copper
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AGA has 256 colours but still only 32 colour registers visible at a time. To load all 256 colours, the Copper uses BPLCON3 to select palette banks:
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AGA has 256 colors but still only 32 color registers visible at a time. To load all 256 colors, the Copper uses BPLCON3 to select palette banks:
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```asm
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; Load colours 0–31 (bank 0)
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; Load colors 0–31 (bank 0)
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dc.w $0106,$0000 ; BPLCON3: bank 0
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dc.w $0180,$0000 ; COLOR00
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dc.w $0182,$0111 ; COLOR01
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; ... all 32 colours ...
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; Switch to bank 1 (colours 32–63)
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; ... all 32 colors ...
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; Switch to bank 1 (colors 32–63)
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dc.w $0106,$2000 ; BPLCON3: bank 1
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dc.w $0180,$0222 ; COLOR32
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dc.w $0182,$0333 ; COLOR33
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| Parameter | Value |
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|---|---|
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| Instruction time | 4 colour clocks (= 8 lo-res pixels = ~1.12 µs) |
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| Instruction time | 4 color clocks (= 8 lo-res pixels = ~1.12 µs) |
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| Max instructions per line | ~112 (NTSC) / ~114 (PAL) |
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| Horizontal resolution | 4 colour clocks (~8 lo-res pixels) |
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| Horizontal resolution | 4 color clocks (~8 lo-res pixels) |
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| Vertical range | 0–255 (wraps; use double-WAIT for PAL lines 256+) |
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| PAL visible lines | 44–300 (256 visible) |
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| NTSC visible lines | 44–244 (200 visible) |
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